# US 12,603,635 B2 · Acoustic wave device and module

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 12,603,635 B2
- Document ID: US12603635B2
- Status: Granted
- Kind: B2
- Application number: 18/461,325
- Filed: 2023-09-05
- Published: 2024-03-14
- Granted: 2026-04-14
- Earliest claimed: 2022-09-08
- Assignees: Sanan Japan Technology Corporation
- Applicants: Sanan Japan Technology Corporation
- Inventors: Yuki Koto; Shinichi Shioi
- Web page: https://patentgrep.com/patent/US12603635B2

## CPC

- H03H 9/0523: {for flip-chip mounting}
- H03H 9/059: {consisting of mounting pads or bumps}
- H03H 9/02102: {of temperature influence (cutting angles H03H9/02015)}
- H03H 9/02834: {of temperature influence (cut angles H03H9/02543)}
- H03H 9/725: {Duplexers}
- H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P)

## Abstract

An acoustic wave device includes a wiring substrate, a wiring substrate-side wiring formed on the wiring board, a chip substrate opposed to the wiring substrate, a chip substrate-side wiring formed on the chip substrate, a plurality of resonators formed on the chip substrate and electrically connected to the chip substrate-side wiring, a plurality of bumps electrically connected to the wiring substrate-side wiring and the chip substrate-side wiring, and a heat dissipation bump bonded to a region of the chip board-side wiring electrically connected to a plurality of resonators and insulated from the wiring substrate-side wiring.

## Claims

### Claim 1

An acoustic wave device comprising:
a wiring substrate;
a wiring substrate-side wiring formed on the wiring substrate;
a chip substrate opposed to the wiring substrate;
a chip substrate-side wiring formed on the chip substrate;
a plurality of resonators formed on the chip substrate and electrically connected to the chip substrate-side wiring;
a plurality of bumps electrically connected to the wiring substrate-side wiring and the chip substrate-side wiring;
a heat dissipation bump bonded to a region of the chip substrate-side wiring electrically connected to a plurality of resonators and insulated from the wiring substrate-side wiring; and
a highly heat conductive insulating layer formed on the wiring substrate-side wiring, wherein the heat dissipation bump is in contact with the highly heat conductive insulating layer.

### Claim 2 (depends on 1)

The acoustic wave device according to claim 1, wherein the highly heat conductive insulating layer is provided on a ground metallic layer as the wiring substrate-side wiring.

### Claim 3 (depends on 1)

The acoustic wave device according to claim 1, wherein the highly heat conductive insulating layer is formed of epoxy resin, polyimide resin, silicon, solder resist, boron nitride, aluminum nitride, aluminum oxide, zinc oxide, or silicon oxide.

### Claim 4

An acoustic wave device comprising:
a wiring substrate;
a wiring substrate-side wiring formed on the wiring substrate;
a chip substrate opposed to the wiring substrate;
a chip substrate-side wiring formed on the chip substrate;
a plurality of resonators formed on the chip substrate and electrically connected to the chip substrate-side wiring;
a plurality of bumps electrically connected to the wiring substrate-side wiring and the chip substrate-side wiring;
a heat dissipation bump bonded to a region of the chip substrate-side wiring electrically connected to a plurality of resonators and insulated from the wiring substrate-side wiring,
wherein the wiring substrate further comprising
an insulating layer,
a plurality of heat dissipation metallic layers stacked through the insulating layer and not electrically connected to the wiring substrate-side wiring,
a heat dissipation via penetrating the insulating layer and electrically connected to the plurality of heat dissipation metallic layers,
wherein the heat dissipation bump is bonded to one of the heat dissipation metallic layers formed on an exposed surface of the wiring substrate.