# US 12,603,612 B2 · Power supply control system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,603,612 B2 - Document ID: US12603612B2 - Status: Granted - Kind: B2 - Application number: 18/137,116 - Filed: 2023-04-20 - Published: 2024-06-27 - Granted: 2026-04-14 - Earliest claimed: 2022-12-22 - Assignees: Analog Devices International Unlimited Company - Applicants: Analog Devices International Unlimited Company - Inventors: Qingyi Huang; Qiping Wan - Web page: https://patentgrep.com/patent/US12603612B2 ## CPC - H03F 1/0227: {using supply converters} - H03F 3/245: {with semiconductor devices only} - H02M 1/009: {having two or more independently controlled outputs (for DC-DC converter with intermediate AC H02M3/33561)} - H02M 1/10: Arrangements incorporating converting means for enabling loads to be operated at will from different kinds of power supplies, e.g. from AC or DC - H03F 2200/504: the supply voltage or current being continuously controlled by a controlling signal, e.g. the controlling signal of a transistor implemented as variable resistor in a supply path for, an IC-block showed amplifier - H03F 2200/511: Many discrete supply voltages or currents or voltage levels can be chosen by a control signal in an IC-block amplifier circuit - H03F: AMPLIFIERS - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) ## Abstract In an example a power supply control system for switchably routing at least a first power supply voltage to an output voltage supply node may include a first compound switch circuit. The first compound switch circuit may include a first field effect transistor (FET), where a drain of the first FET may be connected to the first power supply voltage. The first compound switch circuit may also include a second FET, where a source of the second FET may be connected to a source of the first FET, where a drain of the second FET may be connected to the output voltage supply node, where a gate of the first FET and a gate of the second FET may be connected together to form a first shared source node. The power supply control system may also include first voltage driving circuitry which may drive an “on” gate-to-source voltage level. ## Claims ### Claim 1 A power supply control system for switchably routing at least a first power supply voltage to an output voltage supply node, the system comprising: a first compound switch circuit comprising: a first field effect transistor (FET), wherein a drain of the first FET is connected to the first power supply voltage; and a second FET, wherein a source of the second FET is connected to a source of the first FET, wherein a drain of the second FET is connected to the output voltage supply node, wherein a gate of the first FET and a gate of the second FET are connected together to form a first shared source node; first voltage driving circuitry to drive an “on” gate-to-source voltage level of the first compound switch above a turn-on gate-to-source voltage of the first and second FETs when the first compound switch is to be placed in an “on” state; and a first bootstrap capacitor, configured to be pre-charged to a second power supply voltage when the first compound switch is in an “off” state, and configured to provide the second power supply voltage as the “on” gate-to-source voltage level to the first voltage driving circuitry when the first compound switch is to be placed in the “on” state. ### Claim 2 (depends on 1) The system of claim 1, wherein the second power supply voltage and the first power supply voltage share a common ground reference. ### Claim 3 (depends on 1) The system of claim 1, wherein the system is further configured for switchably routing a third power supply voltage to the output voltage supply node, the system further comprising: a second compound switch circuit comprising: a third FET wherein a drain of the first FET is connected to the third power supply voltage; and a fourth FET, wherein a source of the fourth FET is connected to a source of the third FET, wherein a drain of the fourth FET is connected to the output voltage supply node, wherein a gate of the third FET and a gate of the fourth FET are connected together to form a second shared source node; second voltage driving circuitry to drive an “on” gate-to-source voltage level of the second compound switch above a turn-on gate-to-source voltage of the third and fourth FETs when the second compound switch is to be placed in an “on” state; and a second bootstrap capacitor, configured to be pre-charged to a fourth power supply voltage when the second compound switch is in an “off” state, and configured to provide the fourth power supply voltage as the “on” gate-to-source voltage level to the second voltage driving circuitry when the second compound switch is to be placed in the “on” state. ### Claim 4 (depends on 3) The system of claim 3, wherein the system is further configured for switchably routing N additional power supply voltages to the output voltage supply node, wherein N is an integer greater than or equal to 1, and i is an integer index that is between 1 and N inclusive, the system, for a (3+2*i)th power supply voltage, further comprising: a (2+i)th compound switch circuit comprising: a (3+2*i)th FET wherein a drain of the (3+2*i)th FET is connected to the (3+2*i)th power supply voltage; and a (4+2*i)th FET, wherein a source of the (4+2*i)th FET is connected to a source of the (3+2*i)th FET, wherein a drain of the (4+2*i)th FET is connected to the output voltage supply node, wherein a gate of the (3+2*i)th FET and a gate of the (4+2*i)th FET are connected together to form a (2+i)th shared source node; (2+i)th voltage driving circuitry to drive an “on” gate-to-source voltage level of the (2+i)th compound switch above a turn-on gate-to-source voltage of the (3+2*i)th and (4+2*i)th FETs when the (2+i)th compound switch is to be placed in an “on” state; and a (2+i)th bootstrap capacitor, configured to be pre-charged to a (4+2*i)th power supply voltage when the (2+i)th compound switch is in an “off” state, and configured to provide the (4+2*i)th power supply voltage as the “on” gate-to-source voltage level to the (2+i)th voltage driving circuitry when the (2+i)th compound switch is to be placed in the “on” state. ### Claim 5 (depends on 3) The system of claim 3 wherein the second power supply voltage and the fourth power supply voltage are generated by a common bootstrap charging power supply voltage, and wherein the bootstrap charging power supply voltage, the first power supply voltage, and the third power supply voltage share a common ground reference. ### Claim 6 (depends on 3) The system of claim 3, further comprising a controller to sequence the charging of the bootstrap capacitors and selection of the power supply voltage for output to the output voltage supply node. ### Claim 7 (depends on 3) The system of claim 3, wherein the output voltage supply node is electrically connected to provide a bias voltage to a power amplifier (PA) and is at least one of specified or changed based upon a value or a change in value of a symbol to be communicated. ### Claim 8 (depends on 3) The system of claim 3, wherein a frequency of switching between the first power supply voltage and the third power supply voltage exceeds 20 megahertz. ### Claim 9 (depends on 1) The system of claim 1, wherein the first voltage driving circuitry further comprises a first DC switching device, wherein the first DC switching device is turned “on” to charge the first bootstrap capacitor. ### Claim 10 (depends on 1) The system of claim 1, wherein the output voltage supply node is used to bias a power amplifier (PA). ### Claim 11 (depends on 10) The system of claim 10, further comprising the PA, and wherein the PA is used in a cellular transmitter. ### Claim 12 A circuit for biasing a power amplifier (PA), the circuit comprising: a DC power supply, wherein the DC power supply provides two or more DC voltage levels; a DC switch system for switchably routing one of the two or more DC voltage levels at a time to an output voltage supply node, wherein the DC switch system comprises: a switch circuit for each of the two or more DC voltage levels, the switch circuit for each DC voltage level comprising: a compound switch circuit comprising: a first field effect transistor (FET), wherein a drain of the first FET is connected to a respective DC voltage level; and a second FET, wherein a source of the second FET is connected to a source of the first FET, wherein a drain of the second FET is connected to the output voltage supply node, wherein a gate of the first FET and a gate of the second FET are connected together to form a first shared source node; voltage driving circuitry to drive an “on” gate-to-source voltage level of the compound switch above a turn-on gate-to-source voltage of the first and second FETs when the compound switch is to be placed in an “on” state; and a bootstrap capacitor, configured to be pre-charged to a bootstrap charging power supply voltage when the compound switch is in an “off” state, and configured to provide the bootstrap charging power supply voltage as the “on” gate-to-source voltage level to the voltage driving circuitry when the compound switch is to be placed in the “on” state. ### Claim 13 (depends on 12) The circuit of claim 12, wherein the bootstrap charging power supply voltage is shared by the switch circuits for each of the two or more DC voltage levels, and wherein the bootstrap charging power supply shares a common ground reference with the two or more DC voltage levels. ### Claim 14 (depends on 12) The circuit of claim 12, wherein the PA is used in a cellular transmitter. ### Claim 15 (depends on 14) The circuit of claim 14, further comprising a controller, wherein the controller is configured to select between the two or more DC voltage levels based upon the power of a symbol to be transmitted.