# US 12,603,143 B2 · Memory controller for controlling background operation and operation method thereof

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- Number: US 12,603,143 B2
- Document ID: US12603143B2
- Status: Granted
- Kind: B2
- Application number: 18/645,810
- Filed: 2024-04-25
- Published: 2025-01-30
- Granted: 2026-04-14
- Earliest claimed: 2023-07-28
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Sangsoo Cha; Minjeong Kwon
- Web page: https://patentgrep.com/patent/US12603143B2

## CPC

- G11C 29/1201: {comprising I/O circuitry}
- G06F 3/0604: {Improving or facilitating administration, e.g. storage management}
- G06F 3/061: {Improving I/O performance}
- G06F 3/0614: {Improving the reliability of storage systems}
- G06F 3/064: {Management of blocks}
- G06F 3/0653: {Monitoring storage devices or systems}
- G06F 3/0658: {Controller construction arrangements}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G11C 16/3495: {Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically}
- G11C 29/52: Protection of memory contents; Detection of errors in memory contents
- G06F 2212/1016: Performance improvement
- G06F 2212/1024: Latency reduction
- G06F 2212/1032: Reliability improvement, data loss prevention, degraded operation etc
- G06F 2212/7204: Capacity control, e.g. partitioning, end-of-life degradation
- G06F 2212/7205: Cleaning, compaction, garbage collection, erase control
- G06F 2212/7208: Multiple device management, e.g. distributing data over multiple flash devices
- G11C 2029/0409: {Online test}
- G11C 2029/0411: {Online error correction}
- G11C: STATIC STORES (semiconductor memory devices H10B)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A memory controller includes a health grade determining circuit to determine a health grade of a memory block based on a combination of an error detecting result of data read from at least one page of the block and block information related to a degree of degradation of the block, and an IO ratio setting circuit. The IO ratio setting circuit sets, according to the determined health grade, an IO ratio between a host IO operation and an internal IO operation. The host IO operation exchanges data with the memory device in response to a request from a host and the internal IO operation exchanges data with the memory device in relation to a background operation. The memory controller performs the host IO operation and the internal IO operation with the memory device according to the set IO ratio during a period in which the background operation is performed.

## Claims

### Claim 1

A memory controller that communicates with a memory device comprising a plurality of blocks, the memory controller comprising:
a health grade determining circuit configured to determine a health grade of a first block among the plurality of blocks based on a combination of an error detecting result of data read from a first page of the first block and block information related to a determination of a degree of degradation of the first block; and
an input/output (IO) ratio setting circuit configured to set, according to the determined health grade, an IO ratio between a host IO operation that exchanges data with the memory device in response to a request from a host and an internal IO operation that exchanges data with the memory device in relation to a background operation on the memory device,
wherein the memory controller performs the host IO operation and the internal IO operation with the memory device according to the set IO ratio during a period in which the background operation on the first block is performed, and
wherein, based on the health grade of the first block being different from a health grade of a second block among the plurality of blocks, the IO ratio of the first block is set differently from an IO ratio of the second block and a frequency of performing the host IO operation for the first block is different from a frequency of performing the host IO operation for the second block.

### Claim 2 (depends on 1)

The memory controller of claim 1, wherein the block information comprises at least one of a block address of the first block, a write/erase cycle count of the first block, temperature information generated from the memory controller or the memory device, and a reliability index (RI) of the first block.

### Claim 3 (depends on 2)

The memory controller of claim 2, wherein the block information comprises manufacturing process information, and the memory controller further comprises a storing circuit configured to store, in a nonvolatile manner, the manufacturing process information,
wherein at least one piece of the manufacturing process information stored in the storing circuit is provided to the health grade determining circuit.

### Claim 4 (depends on 1)

The memory controller of claim 1, wherein the first block comprises a plurality of pages, the first page comprises a sample page having a reliability index below a threshold reliability among the plurality of pages, and the health grade determining circuit is configured to determine the health grade of the first block based on a combination of an error detecting result of the sample page and the block information of the first block.

### Claim 5 (depends on 4)

The memory controller of claim 4, wherein, based on errors greater than a certain reference value being detected from data read from a second page of the first block based on a request from the host or an internal read operation, triggering a background operation on the first block, and after the background operation is triggered, the health grade determining circuit is configured to determine the health grade of the first block.

### Claim 6 (depends on 5)

The memory controller of claim 5, wherein the second page includes a page at a different location in the first block from the sample page.

### Claim 7 (depends on 4)

The memory controller of claim 4, wherein, based on locations of sample pages set for the plurality of blocks differing from each other, the health grade determining circuit is configured to determine health grades of the plurality of blocks by using error detecting results of the sample pages at different locations in the plurality of blocks.

### Claim 8 (depends on 1)

The memory controller of claim 1, wherein pieces of block address information of first to Nth blocks, on which a background operation has been triggered, among the plurality of blocks, are stored in a queue, and the background operation on the first to Nth blocks is sequentially performed according to an order of the pieces of block address information stored in the queue, and wherein Nis an integer of 2 or greater.

### Claim 9 (depends on 8)

The memory controller of claim 8, wherein each of the first to Nth blocks comprises the first page, the first page corresponds to a sample page having relatively low reliability among a plurality of pages included in each of the first to Nth blocks, and the order of the background operation on the first to Nth blocks is changed based on error detecting results of the sample pages of the first to Nth blocks.

### Claim 10

An operation method of a memory controller that communicates with a memory device comprising a plurality of blocks, the method comprising:
triggering a background operation on a first block among the plurality of blocks according to an error detecting result of data read from at least one first page of the first block;
setting an input/output (IO) ratio between a host IO operation that exchanges data with the memory device in response to a request from a host and an internal IO operation that exchanges data with the memory device in relation to a background operation on the memory device, as a first value according to a health grade of the first block, wherein the health grade of the first block is determined based on block information related to a determination of a degree of degradation of the first block and an error detecting result of data read from at least one second page of the first block, and wherein based on the health grade of the first block being different from a health grade of a second block among the plurality of blocks, the IO ratio of the first block is set differently from an IO ratio of the second block and a frequency of performing the host IO operation for the first block is different from a frequency of performing the host IO operation for the second block; and
performing the host IO operation and the internal IO operation with the memory device according to the IO ratio set as the first value, during a period in which the background operation on the first block is performed.

### Claim 11 (depends on 10)

The method of claim 10, wherein a ratio of the internal IO is decreased when the health grade indicates that the degree of degradation of the first block is low, and the ratio of the internal IO is increased when the health grade indicates that the degree of degradation of the first block is high.

### Claim 12 (depends on 10)

The method of claim 10, further comprising:
triggering a background operation on a second block among the plurality of blocks; and
setting the IO ratio of the second block as a second value based on a health grade determined for the second block, based on a degree of degradation of the second block being higher than the degree of degradation of the first block,
wherein a speed of the background operation on the second block is faster than a speed of the background operation on the first block.

### Claim 13 (depends on 10)

The method of claim 10, wherein the at least one first page is selected by a request from the host or an internal read operation of the memory device, and the at least one second page is at least one sample page having a reliability index below a certain threshold among a plurality of pages included in the first block.

### Claim 14 (depends on 10)

The method of claim 10, wherein the background operation comprises a reclaim operation of copying data in any one source block to any one destination block and a garbage collection operation of selectively copying valid data in a plurality of source blocks to at least one destination block.

### Claim 15 (depends on 10)

The method of claim 10, wherein the block information comprises at least one of a block address of the first block, a write/erase cycle count of the first block, temperature information generated from the memory controller or the memory device, and a reliability index (RI) of the first block.

### Claim 16 (depends on 10)

The method of claim 10, wherein pieces of block address information of first to Nth blocks, on which a background operation has been triggered among the plurality of blocks, are stored in a queue, and the at least one second page corresponds to a sample page having a reliability index below a certain threshold among a plurality of pages included in each of the first to Nth blocks, wherein N is an integer of 2 or greater, and
further comprising:
detecting errors in the at least one second page in each of the first to Nth blocks; and
changing an order of the background operation on the first to Nth blocks based on an error detecting result of the at least one second page.

### Claim 17

A storage device comprising:
a nonvolatile memory device comprising a plurality of blocks; and
a memory controller configured to perform a host input/output (IO) operation that exchanges data with the nonvolatile memory device in response to a request from a host and an internal IO operation that exchanges data with the nonvolatile memory device in relation to a background operation on the nonvolatile memory device,
wherein the memory controller is further configured to
set, as a first value, a performing ratio of the internal IO operation to the host IO operation with respect to a first block among the plurality of blocks based on block information related to determination of a degree of degradation of the first block and a first error detecting result, and
set, as a second value, a performing ratio of the internal IO operation to the host IO operation with respect to a second block among the plurality of blocks based on block information related to determination of a degree of degradation of the second block and a second error detecting result, and
based on the first value being greater than the second value, a speed of a background operation on the first block is faster than a speed of a background operation on the second block.

### Claim 18 (depends on 17)

The storage device of claim 17, wherein the block information comprises at least one of a block address indicating a location of a block, a write/erase cycle count of each of the first and second blocks, temperature information generated from the memory controller or the memory device, and a reliability index (RI) of each of the first and second blocks.

### Claim 19 (depends on 18)

The storage device of claim 18, wherein at least one sample page having a reliability index below a certain threshold among a plurality of pages is defined for each of the first block and the second block, the first value is set based on the block information of the first block and the first error detecting result of the at least one sample page of the first block, and the second value is set based on the block information of the second block and the second error detecting result of the at least one sample page of the second block.

### Claim 20 (depends on 1)

The memory controller of claim 1, wherein the health grade is based on health points associated with each of the block information and the error detecting result.