Methods of controlling PCRAM devices in single-level-cell (SLC) and multi-level-cell (MLC) modes and a controller for performing the same methods
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWin-San Khwa, Yu-Sheng Chen, Kerem Akarvardar
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Abstract
Various embodiments provide methods for configuring a phase-change random-access memory (PCRAM) structures, such as PCRAM operating in a single-level-cell (SLC) mode or a multi-level-cell (MLC) mode. Various embodiments may support a PCRAM structure being operating in a SLC mode for lower power and a MLC mode for lower variability. Various embodiments may support a PCRAM structure being operating in a SLC mode or a MLC mode based at least in part on an error tolerance for a neural network layer.
Claims20
A memory device comprising:
- a phase-change random-access memory (PCRAM) cell;
- a current sensing circuit;
- and
- a controller configured to:
- receive and process a configuration change command;
- determine whether an attribute of a neural network layer supports a change of an operating mode of the PCRAM cell;
- select a RESET program condition among a plurality of REST program conditions upon a determination that the change is supported;
- and
- program the PCRAM cell using the selected RESET program condition upon the determination that the change is supported.
A memory device comprising:
- a phase-change random-access memory (PCRAM) cell;
- a current sensing circuit;
- and
- a controller configured to:
- receive a configuration change command associated with the PCRAM cell;
- determine a type of the received configuration change command;
- select a RESET program condition from a plurality of stored RESET program conditions based on the determined type of the received configuration change command;
- and
- program the PCRAM cell using the selected RESET program condition, wherein the plurality of stored RESET program conditions includes:
- a first RESET program condition configured to generate a first waveform with a first current amplitude and a first pulse width;
- and
- a second RESET program condition configured to generate a second waveform with a second current amplitude and a second pulse width.
A memory device comprising:
- a phase-change random-access memory (PCRAM) cell;
- a current sensing circuit and/or voltage sensing circuit;
- and
- a controller, wherein the controller is configured to:
- receive a configuration change command associated with the PCRAM cell;
- determine a type of the received configuration change command;
- select a RESET verification condition from a plurality of stored RESET verification conditions;
- program the PCRAM cell using an initial RESET pulse that corresponds to a target operating mode of the configuration change command;
- determine a PCRAM cell condition after programming the PCRAM cell using the initial RESET pulse;
- and
- perform a set of processing steps that comprises:
- a first step of determining whether the determined PCRAM cell condition meets the selected RESET verification condition;
- a second step of modifying a previously employed RESET pulse to generate a modified RESET pulse only if the PCRAM cell condition does not meet the selected RESET verification current condition;
- and
- a third step of programming the PCRAM cell using the modified RESET pulse.
Dependencies are inferred from the claim text.