# US 12,603,060 B2 · Display device

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- Number: US 12,603,060 B2
- Document ID: US12603060B2
- Status: Granted
- Kind: B2
- Application number: 18/967,304
- Filed: 2024-12-03
- Published: 2025-07-03
- Granted: 2026-04-14
- Earliest claimed: 2023-12-28
- Assignees: LG Display Co., Ltd.
- Applicants: LG Display Co., Ltd.
- Inventors: Mangyu Park
- Web page: https://patentgrep.com/patent/US12603060B2

## CPC

- G09G 3/3291: in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
- G09G 3/2092: {Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto (suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165)}
- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G 2310/0289: Details of voltage level shifters arranged for use in a driving circuit
- G09G 2310/08: Details of timing specific for flat panels, other than clock recovery
- G09G 2320/043: Preventing or counteracting the effects of ageing
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

The present disclosure relates to a display device, and more specifically, to a display device for controlling outputs by arranging a masking switch or an XOR gate between a level shifter and a switch array of a data driver. The display device presented herein minimizes or at least reduces the degradation of image quality by controlling the output of the data driver under a specific condition.

## Claims

### Claim 1

A display device, comprising:
a timing controller configured to output image data;
a display panel including a plurality of pixels, and a plurality of data lines connected to the plurality of pixels; and
a data driver configured to generate a data voltage based on the image data, and apply the data voltage to a data line of the plurality of data lines, the data driver including:
a level shifter configured to receive the image data;
a switch array configured to generate the data voltage from the image data;
a masking switch between the level shifter and the switch array; and
an output buffer configured to output the data voltage from the data line.

### Claim 2 (depends on 1)

The display device of claim 1, wherein an output of the output buffer is stopped when the masking switch is turned off.

### Claim 3 (depends on 2)

The display device of claim 2, wherein the masking switch is connected to each of a plurality of level shifters.

### Claim 4 (depends on 2)

The display device of claim 2, wherein the masking switch is connected to an uppermost level shifter among a plurality of level shifters.

### Claim 5 (depends on 1)

The display device of claim 1, wherein the data driver further includes a delay unit connected to a control node of the masking switch.

### Claim 6 (depends on 5)

The display device of claim 5, wherein the delay unit includes a plurality of buffers.

### Claim 7 (depends on 6)

The display device of claim 6, wherein the delay unit operates asynchronously.

### Claim 8 (depends on 7)

The display device of claim 7, wherein the delay unit includes a plurality of flip-flops.

### Claim 9 (depends on 8)

The display device of claim 8, wherein the delay unit operates synchronously, and the delay unit includes one clock.

### Claim 10 (depends on 1)

The display device of claim 1, wherein the data driver further includes a latch configured to maintain the image data as per-frame image data on at least one channel unit basis and provide the image data to the level shifter.

### Claim 11 (depends on 10)

The display device of claim 10, wherein the latch operates in synchronization with a latch start pulse that controls a start time point at which the data voltage is supplied to the level shifter.

### Claim 12 (depends on 11)

The display device of claim 11, wherein the data driver further includes a delay unit connected to a control node of the masking switch.

### Claim 13 (depends on 12)

The display device of claim 12, wherein the latch start pulse is supplied to an input of the delay unit.

### Claim 14 (depends on 1)

The display device of claim 1, further comprising:
a gamma driver configured to generate gamma reference voltages based on a gamma control signal generated by the timing controller,
wherein the data driver further includes a plurality of resistor strings configured to output a plurality of analog voltages to the level shifter based on the gamma reference voltages.
