# US 12,603,058 B1 · Electronic device

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- Number: US 12,603,058 B1
- Document ID: US12603058B1
- Status: Granted
- Kind: B1
- Application number: 19/084,770
- Filed: 2025-03-20
- Granted: 2026-04-14
- Earliest claimed: 2025-03-20
- Assignees: Innolux Corporation
- Applicants: Innolux Corporation
- Inventors: Shuhei Hosaka
- Web page: https://patentgrep.com/patent/US12603058B1

## CPC

- G09G 3/3266: Details of drivers for scan electrodes
- G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters}
- G09G 2300/0408: Integration of the drivers onto the display substrate
- G09G 2300/0426: Layout of electrodes and connections
- G09G 2300/0814: used for selection purposes, e.g. logical AND for partial update
- G09G 2310/0267: Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
- G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit
- G09G 2310/0291: Details of output amplifiers or buffers arranged for use in a driving circuit
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

An electronic device is provided. The electronic device includes electronic unit rows and a gate driver. The gate driver is disposed between any two adjacent rows of the electronic unit rows. The gate driver includes a first output stage and a second output stage. The first output stage includes a first logic circuit and a first amplifier. The first amplifier receives a first signal from the first logic circuit and outputs a first gate signal to a first row among the electronic unit rows according to the first signal. The second output stage includes a second logic circuit and a second amplifier. The second amplifier receives a second signal from the second logic circuit and outputs a second gate signal to a second row among the electronic unit rows according to the second signal.

## Claims

### Claim 1

An electronic device, comprising:
a plurality of electronic unit rows; and
a gate driver, disposed between any two adjacent electronic unit rows of the plurality of electronic unit rows, wherein the gate driver comprises:
a first output stage, comprising a first logic circuit and a first amplifier, wherein the first amplifier receives a first signal from the first logic circuit and outputs a first gate signal to a first electronic unit row among the plurality of electronic unit rows according to the first signal; and
a second output stage, comprising a second logic circuit and a second amplifier, wherein the second amplifier receives a second signal from the second logic circuit and outputs a second gate signal to a second electronic unit row among the plurality of electronic unit rows according to the second signal,
wherein the first electronic unit row is adjacent to the second electronic unit row, and the first logic circuit and the second logic circuit are located between the first amplifier and the second amplifier.

### Claim 2 (depends on 1)

The electronic device of claim 1, wherein:
the first logic circuit receives a start signal and outputs the first signal according to the start signal, and
the second logic circuit receives the first signal and outputs the second signal according to the first signal.

### Claim 3 (depends on 1)

The electronic device of claim 1, wherein the gate driver further comprises:
a third output stage, comprising a third logic circuit and a third amplifier, wherein the third amplifier receives a third signal from the third logic circuit and outputs a third gate signal to a third electronic unit row among the plurality of electronic unit rows according to the third signal; and
a fourth output stage, comprising a fourth logic circuit and a fourth amplifier, wherein the fourth amplifier receives a fourth signal from the fourth logic circuit and outputs a fourth gate signal to a fourth electronic unit row among the plurality of electronic unit rows according to the fourth signal,
wherein the third electronic unit row is adjacent to the fourth electronic unit row, and the third logic circuit and the fourth logic circuit are located between the third amplifier and the fourth amplifier.

### Claim 4 (depends on 3)

The electronic device of claim 3, wherein the third logic circuit receives the second signal and outputs the third signal according to the second signal.

### Claim 5 (depends on 3)

The electronic device of claim 3, wherein the fourth logic circuit receives the third signal and outputs the fourth signal according to the third signal.

### Claim 6 (depends on 3)

The electronic device of claim 3, wherein:
the first output stage and the third output stage are disposed between the second electronic unit row and the third electronic unit row along a column direction, and
the second output stage and the fourth output stage are disposed between the second electronic unit row and the third electronic unit row along the column direction.

### Claim 7 (depends on 3)

The electronic device of claim 3, wherein:
the first amplifier, the first logic circuit, the second logic circuit and the second amplifier are arranged along a row direction, and
the third amplifier, the third logic circuit, the fourth logic circuit and the fourth amplifier are arranged along the row direction.

### Claim 8 (depends on 3)

The electronic device of claim 3, wherein:
the first logic circuit comprises a first shift register and a first select circuit,
the second logic circuit comprises a second shift register and a second select circuit, and
the third logic circuit comprises a third shift register and a third select circuit,
the fourth logic circuit comprises a fourth shift register and a fourth select circuit, and
in a forward scan mode, the first select circuit controls the first shift register to output the first signal according to a start signal, the second select circuit controls the second shift register to output the second signal according to the first signal, and
in the forward scan mode, the third select circuit controls the third shift register to output the third signal according to the second signal, the fourth select circuit controls the fourth shift register to output the fourth signal according to the third signal.

### Claim 9 (depends on 8)

The electronic device of claim 8, wherein the first select circuit is located between the first amplifier and the first shift register.

### Claim 10 (depends on 8)

The electronic device of claim 8, wherein:
the first shift register has a first circuit portion and a second circuit portion,
the third shift register has a third circuit portion and a fourth circuit portion, and
the first circuit portion, the third circuit portion, a first electronic unit of the first electronic unit row, a first electronic unit of the second electronic unit row, a first electronic unit of the third electronic unit row and a first electronic unit of the fourth electronic unit row are arranged in a first column.

### Claim 11 (depends on 10)

The electronic device of claim 10, wherein the second circuit portion, the fourth circuit portion, a second electronic unit of the first electronic unit row, a second electronic unit of the second electronic unit row, a second electronic unit of the third electronic unit row and a second electronic unit of the fourth electronic unit row are arranged in a second column adjacent to the first column.

### Claim 12 (depends on 11)

The electronic device of claim 11, further comprising:
a clock line group, configured to transmit at least one clock; and
a data line group, configured to transmit data signals for the first electronic unit row, the second electronic unit row, the third electronic unit row, and the fourth electronic unit row,
wherein the clock line group and the data line group are separated by the first column.

### Claim 13 (depends on 12)

The electronic device of claim 12, further comprising:
a shift pulse line group, configured to transmit the first signal, the second signal, the third signal and the fourth signal,
wherein the shift pulse line group and the data line group are separated by the second column.

### Claim 14 (depends on 11)

The electronic device of claim 11, wherein:
the first amplifier has a fifth circuit portion and a sixth circuit portion,
the third amplifier has a seventh circuit portion and an eighth circuit portion, and
the fifth circuit portion, the seventh circuit portion, a third electronic unit of the first electronic unit row, a third electronic unit of the second electronic unit row, a third electronic unit of the third electronic unit row and a third electronic unit of the fourth electronic unit row are arranged in a third column.

### Claim 15 (depends on 14)

The electronic device of claim 14, wherein the sixth circuit portion, the eighth circuit portion, a fourth electronic unit of the first electronic unit row, a fourth electronic unit of the second electronic unit row, a fourth electronic unit of the third electronic unit row and a third electronic unit of the fourth electronic unit row are arranged in a fourth column adjacent to the third column.

### Claim 16 (depends on 1)

The electronic device of claim 1, wherein the first amplifier comprises:
a first sub amplifier, configured to output the first gate signal to a first electronic unit group of the first electronic unit row according to the first signal; and
a second sub amplifier, configured to output the first gate signal to a second electronic unit group of the first electronic unit row according to the first signal.

### Claim 17 (depends on 1)

The electronic device of claim 1, wherein:
the first logic circuit receives a first start signal and outputs the first signal according to the first start signal, and
the second logic circuit receives a second start signal and outputs the second signal according to the second start signal.

### Claim 18 (depends on 17)

The electronic device of claim 17, wherein the gate driver further comprises:
a third output stage, comprising a third logic circuit and a third amplifier, wherein the third amplifier receives a third signal from the third logic circuit and outputs a third gate signal to a third electronic unit row among the plurality of electronic unit rows according to the third signal; and
a fourth output stage, comprising a fourth logic circuit and a fourth amplifier, wherein the fourth amplifier receives a fourth signal from the fourth logic circuit and outputs a fourth gate signal to a fourth electronic unit row among the plurality of electronic unit rows according to the fourth signal,
wherein the third electronic unit row is adjacent to the fourth electronic unit row, and the third logic circuit and the fourth logic circuit are located between the third amplifier and the fourth amplifier.

### Claim 19 (depends on 18)

The electronic device of claim 18, wherein the third logic circuit receives the first signal and outputs the third signal according to the first signal.

### Claim 20 (depends on 18)

The electronic device of claim 18, wherein the fourth logic circuit receives the second signal and outputs the fourth signal according to the second signal.
