# US 12,603,047 B2 · Display substrate comprising a pixel driving circuit having a compensation sub-circuit and operating method therefor, and display apparatus > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,603,047 B2 - Document ID: US12603047B2 - Status: Granted - Kind: B2 - Application number: 18/857,206 - Filed: 2024-01-03 - Published: 2025-09-11 - Granted: 2026-04-14 - Earliest claimed: 2023-01-05 - Assignees: Chengdu Boe Optoelectronics Technology Co., Ltd.; Boe Technology Group Co., Ltd. - Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd.; BOE Technology Group Co., Ltd. - Inventors: Yipeng Chen; Zhenglong Yan; Hongting Lu; Ling Shi - Web page: https://patentgrep.com/patent/US12603047B2 ## CPC - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 2300/043: Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2320/0233: Improving the luminance or brightness uniformity across the screen - G09G 2330/021: Power management, e.g. power saving - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A display substrate and an operating method therefor, and a display apparatus. The display substrate comprises a plurality of pixel driving circuits and a plurality of light-emitting elements respectively connected to the plurality of pixel driving circuits, wherein the plurality of pixel driving circuits are configured to drive the plurality of light-emitting elements to emit light, and at least one pixel driving circuit comprises a first reset sub-circuit, a compensation sub-circuit, a write sub-circuit, a second reset sub-circuit, a driving sub-circuit, and a light-emission sub-circuit. ## Claims ### Claim 1 A display substrate comprising a plurality of pixel driving circuits and a plurality of light emitting elements respectively connected with the plurality of pixel driving circuits, the plurality of pixel driving circuits being configured to drive the plurality of light emitting elements to emit light, and at least one pixel driving circuit comprising a first reset sub-circuit, a compensation sub-circuit, a writing sub-circuit, a second reset sub-circuit, a driving sub-circuit, and a light emitting sub-circuit, and the driving sub-circuit comprising a driving transistor, wherein: the first reset sub-circuit is connected with an initial signal line, a second node and a first scan signal line respectively, and is configured to write an initial signal of the initial signal line to the second node under control of the first scan signal line; the compensation sub-circuit is connected with a first power supply line, the first scan signal line, a first node, the second node, and a third node respectively, and is configured to supply a signal of the third node to the first node in a reset stage under control of the first scan signal line, wherein a time for which the signal of the third node is supplied to the first node in a threshold compensation stage is adjustable until a signal of the first node is capable of meeting a threshold condition; the writing sub-circuit is connected with a fourth scan signal line, a data signal line, and the first node respectively, and is configured to, under control of the fourth scan signal line, write a data signal of the data signal line to the first node; and couple a signal of the first node to the second node in a data writing stage to enable a signal of the second node to meet the threshold condition; the second reset sub-circuit is connected with the initial signal line, a second scan signal line, and a first electrode of a light emitting element respectively, and is configured to, under control of the second scan signal line, write the initial signal of the initial signal line to the first electrode of the light emitting element, and write the initial signal of the initial signal line to the third node via the light emitting sub-circuit and the driving sub-circuit in the threshold compensation stage, supply a potential of the third node to the first node via the compensation sub-circuit, and charge a difference between an initial voltage output by the initial signal line and a threshold voltage of the driving transistor into the first node; the driving sub-circuit is connected with the second node, the third node and a fourth node respectively, and is configured to supply a driving current to the fourth node according to signals of the second node and the third node; and the light emitting sub-circuit is connected with the first power supply line, the third node, the fourth node, a first light emitting signal line, a second light emitting signal line, and the first electrode of the light emitting element respectively, and is configured to write a signal of the first power supply line to the third node under control of the first light emitting signal line, and write a signal of the fourth node to the first electrode of the light emitting element under control of the second light emitting signal line. ### Claim 2 (depends on 1) The display substrate according to claim 1, wherein the time for which the signal of the third node is supplied to the first node in the threshold compensation stage is 2H to 100H, with H being a scan time of a row of sub-pixels. ### Claim 3 (depends on 1) The display substrate according to claim 1, wherein: the compensation sub-circuit comprises a second transistor, a first capacitor and a second capacitor; a control electrode of the second transistor is connected with the first scan signal line, a first electrode of the second transistor is connected with the first node, and a second electrode of the second transistor is connected with the third node; a first electrode plate of the first capacitor is connected with the first power supply line, and a second electrode plate of the first capacitor is connected with the first node; and a first electrode plate of the second capacitor is connected with the first node, and a second electrode plate of the second capacitor is connected with the second node. ### Claim 4 (depends on 1) The display substrate according to claim 1, wherein: the writing sub-circuit comprises an eighth transistor; and a control electrode of the eighth transistor is connected with the fourth scan signal line, a first electrode of the eighth transistor is connected with the data signal line, and a second electrode of the eighth transistor is connected with the first node. ### Claim 5 (depends on 1) The display substrate according to claim 1, wherein: the second reset sub-circuit comprises a seventh transistor; and a control electrode of the seventh transistor is connected with the second scan signal line, a first electrode of the seventh transistor is connected with the initial signal line, and a second electrode of the seventh transistor is connected with the first electrode of the light emitting element. ### Claim 6 (depends on 1) The display substrate according to claim 1, wherein: the light emitting sub-circuit comprises a fifth transistor and a sixth transistor; a control electrode of the fifth transistor is connected with the first light emitting signal line, a first electrode of the fifth transistor is connected with the first power supply line, and a second electrode of the fifth transistor is connected with the third node; and a control electrode of the sixth transistor is connected with the second light emitting signal line, a first electrode of the sixth transistor is connected with the fourth node, and a second electrode of the sixth transistor is connected with the first electrode of the light emitting element. ### Claim 7 (depends on 1) The display substrate according to claim 1, wherein: the first reset sub-circuit comprises a first transistor; and a control electrode of the first transistor is connected with the first scan signal line, a first electrode of the first transistor is connected with the initial signal line, and a second electrode of the first transistor is connected with the second node. ### Claim 8 (depends on 1) The display substrate according to claim 1, wherein: the driving transistor is a third transistor; and a control electrode of the third transistor is connected with the second node, a first electrode of the third transistor is connected with the third node, and a second electrode of the third transistor is connected with the fourth node. ### Claim 9 (depends on 1) The display substrate according to claim 1, further comprising a reference voltage supplying sub-circuit, wherein the reference voltage supplying sub-circuit is connected with a reference voltage signal line, a third scan signal line, and the third node respectively, and is configured to write a reference voltage signal of the reference voltage signal line to the third node under control of the third scan signal line. ### Claim 10 (depends on 9) The display substrate according to claim 9, wherein: the reference voltage supplying sub-circuit comprises a fourth transistor; and a control electrode of the fourth transistor is connected with the third scan signal line, a first electrode of the fourth transistor is connected with the reference voltage signal line, and a second electrode of the fourth transistor is connected with the third node. ### Claim 11 (depends on 9) The display substrate according to claim 9, wherein: the first reset sub-circuit comprises a first transistor; the compensation sub-circuit comprises a second transistor, a first capacitor, and a second capacitor; the driving sub-circuit comprises a third transistor; the reference voltage supplying sub-circuit comprises a fourth transistor; the light emitting sub-circuit comprises a fifth transistor and a sixth transistor; the second reset sub-circuit comprises a seventh transistor; and the writing sub-circuit comprises an eighth transistor, and wherein: a control electrode of the first transistor is connected with the first scan signal line, a first electrode of the first transistor is connected with the initial signal line, and a second electrode of the first transistor is connected with the second node; a control electrode of the second transistor is connected with the first scan signal line, a first electrode of the second transistor is connected with the first node, and a second electrode of the second transistor is connected with the third node; a control electrode of the third transistor is connected with the second node, a first electrode of the third transistor is connected with the third node, and a second electrode of the third transistor is connected with the fourth node; a control electrode of the fourth transistor is connected with the third scan signal line, a first electrode of the fourth transistor is connected with the reference voltage signal line, and a second electrode of the fourth transistor is connected with the third node; a control electrode of the fifth transistor is connected with the first light emitting signal line, a first electrode of the fifth transistor is connected with the first power supply line, and a second electrode of the fifth transistor is connected with the third node; a control electrode of the sixth transistor is connected with the second light emitting signal line, a first electrode of the sixth transistor is connected with the fourth node, and a second electrode of the sixth transistor is connected with the first electrode of the light emitting element; a control electrode of the seventh transistor is connected with the second scan signal line, a first electrode of the seventh transistor is connected with the initial signal line, and a second electrode of the seventh transistor is connected with the first electrode of the light emitting element; a control electrode of the eighth transistor is connected with the fourth scan signal line, a first electrode of the eighth transistor is connected with the data signal line, and a second electrode of the eighth transistor is connected with the first node; a first electrode plate of the first capacitor is connected with the first power supply line, and a second electrode plate of the first capacitor is connected with the first node; a first electrode plate of the second capacitor is connected with the first node, and a second electrode plate of the second capacitor is connected with the second node. ### Claim 12 (depends on 11) The display substrate according to claim 11, wherein the first transistor to the second transistor and the eighth transistor are oxide transistors, and the third transistor to the seventh transistor are low temperature poly-crystalline silicon transistors. ### Claim 13 (depends on 1) The display substrate according to claim 1, wherein: the second reset sub-circuit is configured to write the initial signal of the initial signal line to a fifth node in the threshold compensation stage under control of the second scan signal line; the light emitting sub-circuit is further configured to supply the initial signal of the fifth node to the fourth node under control of the second light emitting signal line; and the driving sub-circuit is further configured to write the initial signal of the fourth node to the third node under control of the second node. ### Claim 14 (depends on 1) A display apparatus comprising a plurality of light emitting elements and a plurality of display substrates according to claim 1. ### Claim 15 An operating method of a display substrate, wherein the display substrate comprises a plurality of pixel driving circuits and a plurality of light emitting elements respectively connected with the plurality of pixel driving circuits, the plurality of pixel driving circuits are configured to drive the plurality of light emitting elements to emit light, and at least one pixel driving circuit comprises a first reset sub-circuit, a compensation sub-circuit, a writing sub-circuit, a second reset sub-circuit, a driving sub-circuit and a light emitting sub-circuit, and the driving sub-circuit comprising a driving transistor, the operating method of the display substrate comprises: under control of a first scan signal line, writing, by the first reset sub-circuit, an initial signal of an initial signal line to a second node; under control of the first scan signal line, supplying, by the compensation sub-circuit, a signal of a third node to a first node in a reset stage, wherein a time for which the signal of the third node is supplied to the first node in a threshold compensation stage is adjustable until a signal of the first node is capable of meeting a threshold condition; under control of a fourth scan signal line, writing, by the writing sub-circuit, a data signal of a data signal line to the first node; and coupling a signal of the first node to a second node in a data writing stage to enable a signal of the second node to meet the threshold condition; under control of a second scan signal line, writing, by the second reset sub-circuit, the initial signal of the initial signal line to a first electrode of a light emitting element, and writing the initial signal of the initial signal line to the third node via the light emitting sub-circuit and the driving sub-circuit in the threshold compensation stage, supplying a potential of the third node to the first node via the compensation sub-circuit, and charging a difference between an initial voltage output by the initial signal line and a threshold voltage of the driving transistor into the first node; supplying, by the driving sub-circuit, a driving current to a fourth node according to signals of the second node and the third node; and under control of a first light emitting signal line, writing, by the light emitting sub-circuit, a signal of a first power supply line to the third node, and under control of a second light emitting signal line, writing, by the light emitting sub-circuit, a signal of the fourth node to the first electrode of the light emitting element. ### Claim 16 (depends on 15) The operating method according to claim 15, further comprising: under control of a third scan signal line, writing, by a reference voltage supplying sub-circuit, a reference voltage signal of a reference voltage signal line to the third node. ### Claim 17 (depends on 16) The operating method according to claim 16, wherein the time for which the signal of the third node is supplied to the first node in the threshold compensation stage is 2H to 100H, with H being a scan time of a row of sub-pixels. ### Claim 18 (depends on 16) The operating method according to claim 16, further comprising: under control of the second scan signal line, writing, by the second reset sub-circuit, the initial signal of the initial signal line to a fifth node in the threshold compensation phase; under control of the second light emitting signal line, supplying, by the light emitting sub-circuit, an initial signal of the fifth node to the fourth node; and under control of the second node, writing, by the driving sub-circuit, an initial signal of the fourth node to the third node. ### Claim 19 (depends on 15) The operating method according to claim 15, wherein the time for which the signal of the third node is supplied to the first node in the threshold compensation stage is 2H to 100H, with H being a scan time of a row of sub-pixels. ### Claim 20 (depends on 15) The operating method according to claim 15, further comprising: under control of the second scan signal line, writing, by the second reset sub-circuit, the initial signal of the initial signal line to a fifth node in the threshold compensation phase; under control of the second light emitting signal line, supplying, by the light emitting sub-circuit, an initial signal of the fifth node to the fourth node; and under control of the second node, writing, by the driving sub-circuit, an initial signal of the fourth node to the third node.