# US 12,602,472 B2 · Blinding countermeasure to secure multiplication operations against side channel attacks

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- Number: US 12,602,472 B2
- Document ID: US12602472B2
- Status: Granted
- Kind: B2
- Application number: 18/202,173
- Filed: 2023-05-25
- Published: 2024-11-28
- Granted: 2026-04-14
- Earliest claimed: 2023-05-25
- Assignees: Synopsys, Inc.
- Applicants: Synopsys, Inc.
- Inventors: Nimisha Limaye
- Web page: https://patentgrep.com/patent/US12602472B2

## CPC

- G06F 21/556: {involving covert channels, i.e. data leakage between processes (inhibiting the analysis of circuitry or operation with measures against power attack G06F21/755)}
- G06F 5/01: for shifting, e.g. justifying, scaling, normalising {(digital stores in which the information is moved stepwise, e.g. shift-registers G11C19/00; digital stores in which the information circulates G11C21/00)}
- G06F 7/523: Multiplying only
- G06F 21/755: {with measures against power attack}
- H04L 9/003: {for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

Certain aspects are directed to apparatus and methods for performing a blinded operation. The method generally includes: obtaining a first operand and a second operand for a multiplication operation; performing, via one or more processors, one or more shift operations or a bit-flip operation on the first operand to generate a first blinded operand; and performing the multiplication operation based on the first blinded operand and the second operand to generate a blinded multiplication result.

## Claims

### Claim 1

A method for performing a blinded operation, comprising:
obtaining a first operand and a second operand for a multiplication operation;
performing, via one or more processors, one or more shift operations or a bit-flip operation on the first operand to generate a first blinded operand, wherein the first blinded operand is generated to reduce or randomize a difference between a power profile of the multiplication operation and a power profile of another multiplication operation in order to inhibit side channel attacks for the multiplication operation, the difference being reduced or randomized by implementing a hamming weight adjustment via the one or more shift operations or the bit-flip operation to modify the power profile of the multiplication operation; and performing the multiplication operation based on the first blinded operand and the second operand to generate a blinded multiplication result.

### Claim 2 (depends on 1)

The method of claim 1, wherein the first blinded operand is generated by performing the one or more shift operations, and wherein performing the one or more shift operations includes appending a logic high value to the first operand after each of the one or more shift operations.

### Claim 3 (depends on 1)

The method of claim 1, wherein the first blinded operand is generated by performing the one or more shift operations based on the first operand having a most significant bit (MSb) that is logic low.

### Claim 4 (depends on 1)

The method of claim 1, wherein the first blinded operand is generated by performing the one or more shift operations, and wherein a number of shift operations associated with the one or more shift operations is less than a number of MSb(s) of the first operand that are logic low.

### Claim 5 (depends on 1)

The method of claim 1, wherein the first blinded operand is generated by performing the one or more shift operations based on the first operand having a least significant bit (LSb) that is logic low.

### Claim 6 (depends on 1)

The method of claim 1, wherein the first blinded operand is generated by performing the one or more shift operations, and wherein a number of shift operations associated with the one or more shift operations is less than a number of LSb(s) of the first operand that are logic low.

### Claim 7 (depends on 1)

The method of claim 1, wherein the first blinded operand is generated by performing the one or more shift operations, the method further comprising randomly selecting a number of shift operations associated with the one or more shift operations.

### Claim 8 (depends on 1)

The method of claim 1, further comprising:
performing one or more shift operations of the second operand to yield a shifted second operand; and
unblinding the blinded multiplication result based on the shifted second operand.

### Claim 9 (depends on 8)

The method of claim 8, wherein performing the one or more shift operations of the second operand includes appending a logic low value to the second operand after each of the one or more shift operations of the second operand.

### Claim 10 (depends on 1)

The method of claim 1, wherein the first blinded operand is generated by performing the bit-flip operation, the method further comprising randomly selecting a bit of the first operand to flip for the bit-flip operation.

### Claim 11 (depends on 1)

The method of claim 1, further comprising performing one or more shift operations or a bit-flip operation on the second operand to generate a second blinded operand, wherein the multiplication operation is performed based on the first blinded operand and the second blinded operand to generate the blinded multiplication result.

### Claim 12

An apparatus for performing a blinded operation, comprising: memory; and one or more processors coupled to the memory and configured to: obtain a first operand and a second operand for a multiplication operation; perform one or more shift operations or a bitflip operation on the first operand to generate a first blinded operand, wherein the first blinded operand is generated to reduce or randomize a difference between a power profile of the multiplication operation and a power profile of another multiplication operation in order to inhibit side channel attacks for the multiplication operation, the difference being reduced or randomized by implementing a hamming weight adjustment via the one or more shift operations or the bit-flip operation to modify the power profile of the multiplication operation; and perform the multiplication operation based on the first blinded operand and the second operand to generate a blinded multiplication result.

### Claim 13 (depends on 12)

The apparatus of claim 12, wherein:
to generate the first blinded operand, the one or more processors are configured to perform the one or more shift operations; and
to perform the one or more shift operations, the one or more processors are configured to append a logic high value to the first operand after each of the one or more shift operations.

### Claim 14 (depends on 12)

The apparatus of claim 12, wherein to generate the first blinded operand, the one or more processors are configured to perform the one or more shift operations based on the first operand having a most significant bit (MSb) that is logic low.

### Claim 15 (depends on 12)

The apparatus of claim 12, wherein the first blinded operand is generated by performing the one or more shift operations, and wherein a number of shift operations associated with the one or more shift operations is less than a number of MSb(s) of the first operand that are logic low.

### Claim 16 (depends on 12)

The apparatus of claim 12, wherein to generate the first blinded operand, the one or more processors are configured to perform the one or more shift operations based on the first operand having a least significant bit (LSb) that is logic low.

### Claim 17 (depends on 12)

The apparatus of claim 12, wherein the first blinded operand is generated by performing the one or more shift operations, and wherein a number of shift operations associated with the one or more shift operations is less than a number of LSb(s) of the first operand that are logic low.

### Claim 18 (depends on 12)

The apparatus of claim 12, wherein, to generate the first blinded operand, the one or more processors are configured to perform the one or more shift operations, the one or more processors being further configured to randomly select a number of shift operations associated with the one or more shift operations.

### Claim 19 (depends on 12)

The apparatus of claim 12, wherein the one or more processors are further configured to:
perform one or more shift operations of the second operand to yield a shifted second operand; and
unblind the blinded multiplication result based on the shifted second operand.

### Claim 20

A computer-readable medium having instructions stored thereon, that when executed by one or more processors, are configured to: obtain a first operand and a second operand for a multiplication operation; perform one or more shift operations or a bit-flip operation on the first operand to generate a first blinded operand, wherein the first blinded operand is generated to reduce or randomize a difference between a power profile of the multiplication operation and a power profile of another multiplication operation in order to inhibit side channel attacks for the multiplication operation, the difference being reduced or randomized by implementing a hamming weight adjustment via the one or more shift operations or the bit-flip operation to modify the power profile of the multiplication operation; and perform the multiplication operation based on the first blinded operand and the second operand to generate a blinded multiplication result.
