Host endpoint adaptive compute composability

A processor system, comprising:

• a plurality of core complex chiplets each comprising at least one processor core;
• an accelerator chiplet;
• and
• an interconnect connecting the plurality of core complex chiplets to each other and to the accelerator chiplet, the interconnect comprising:
• a composable agent configured to assign at least one of the plurality of core complex chiplets to the accelerator chiplet to form an IO device while the remaining plurality of core complex chiplets form a central processing unit (CPU) for a host, wherein the composable agent is further configured to sever coherent connections between the at least one of the plurality of core complex chiplets and the remaining plurality of core complex chiplets.

A method, comprising:

• selecting at least one of a plurality of core complex chiplets to assign to an IO device while the remaining ones of the plurality of core complex chiplets are assigned to a CPU of a host;
• removing the selected core complex chiplet as a peer of the remaining ones of the plurality of core complex chiplets, including severing coherent connections between the selected core complex chiplet and the remaining ones of the plurality of core complex chiplets;
• and
• adding the selected core complex chiplet to the IO device, wherein the plurality of core complex chiplets are disposed on a same substrate as an accelerator chiplet also assigned to the IO device.