Systems, methods, and devices for accelerators with virtualization and tiered memory

A system comprising:

• an interconnect interface;
• a memory system coupled to the interconnect interface to receive data;
• a processing device coupled to the memory system;
• circuitry configured to partition the processing device into one or more virtual accelerators;
• and
• wherein a first one of the one or more virtual accelerators is configured to perform a first operation on a first portion of the data;
• and
• a memory manager configured to determine a portion of a first memory device to receive the first portion of the data and a portion of a second memory device to receive a second data based on compute resources of the first memory device and the second memory device.

A device comprising:

• a first memory device coupled to an interconnect interface to receive first data;
• a second memory device coupled to the interconnect interface to receive second data;
• a processing device coupled to the first memory device and the second memory device and configured to perform an operation using the first data or the second data;
• and
• a memory manager configured to determine a portion of the first memory device to receive the first data and a portion of the second memory device to receive the second data based on compute resources of the first memory device and the second memory device.