# US 12,602,187 B2 · Systems and methods for collecting trace data via a memory device

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- Number: US 12,602,187 B2
- Document ID: US12602187B2
- Status: Granted
- Kind: B2
- Application number: 18/630,776
- Filed: 2024-04-09
- Published: 2025-07-24
- Granted: 2026-04-14
- Earliest claimed: 2024-01-24
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Dongyang Li; Andrew Chang
- Web page: https://patentgrep.com/patent/US12602187B2

## CPC

- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 12/0868: Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
- G06F 3/0604: {Improving or facilitating administration, e.g. storage management}
- G06F 3/0683: {Plurality of storage devices}
- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G06F 2212/1024: Latency reduction
- G06F 2212/205: Hybrid memory, e.g. using both volatile and non-volatile memory
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Systems and methods for collecting trace data via a memory device are disclosed. One method may include receiving, by the memory device, a command from a computing device; identifying, by the memory device, first data associated with the command; storing, by the memory device, the first data in a first portion of volatile memory of the memory device for reading by the computing device; and accessing, by the memory device, a second portion of the volatile memory, wherein the second portion of the volatile memory is configured to store a copy of second data stored in a non-volatile memory of the memory device.

## Claims

### Claim 1

A method comprising:
advertising, by a memory device, a first portion of a volatile memory of the memory device as a first type of memory having a first size, and a second portion of the volatile memory as a second type of memory different from the first type of memory, the second portion having a second size, wherein the first type of memory is configured to emulate a persistent memory;
receiving, by the memory device, a command from a computing device;
identifying, by the memory device, a memory address and a type of memory access associated with the command;
storing, by the memory device in the first portion of the volatile memory of the memory device, the memory address and identification of the type of memory access;
providing a notification for the computing device;
based the notification, receiving by the memory device a request for information stored in the first portion of the volatile memory; and
providing, based on the request, the memory address and the identification of the type of memory access for processing by the computing device to make a configuration decision for the second portion of the volatile memory.

### Claim 2 (depends on 1)

The method of claim 1, wherein the command is for reading or writing second data from or to a non-volatile memory of the memory device, and the memory address identifies a physical address associated with the second data.

### Claim 3 (depends on 2)

The method of claim 2, further comprising: accessing the second portion of the volatile memory is based on detecting the command.

### Claim 4 (depends on 1)

The method of claim 1, wherein the command is for performing a computation by the memory device, the method further comprising:
identifying, by the memory device, a result of the computation; and
storing, by the memory device, the result of the computation in the first portion of the volatile memory.

### Claim 5 (depends on 1)

The method of claim 1, further comprising:
detecting, by the memory device, fullness of the first portion of the volatile memory; and
generating, by the memory device, the notification based on the detecting of the fullness of the first portion of the volatile memory.

### Claim 6 (depends on 1)

The method of claim 1, wherein the first portion of the volatile memory is mapped to a first physical address space of the computing device and accessed by the computing device via a memory access operation.

### Claim 7 (depends on 1)

The method of claim 1, wherein the memory device is configured to transmit second data to the computing device based on accessing the second portion of the volatile memory.

### Claim 8 (depends on 1)

The method of claim 1, wherein the configuration decision includes reconfiguring the second portion of the volatile memory for increasing a cache hit ratio.

### Claim 9 (depends on 8)

The method of claim 8, wherein the reconfiguring of the second portion includes modifying a cache algorithm.

### Claim 10

A memory device comprising:
a controller;
a volatile memory; and
a non-volatile memory,
wherein the controller is configured to:
advertise a first portion of the volatile memory as a first type of memory having a first size, and a second portion of the volatile memory as a second type of memory different from the first type of memory, the second portion having a second size, wherein the first type of memory is configured to emulate a persistent memory;
receive a command from a computing device;
identify a memory address and a type of memory access associated with the command;
store the memory address and identification of the type of memory access in the first portion of the volatile memory;
provide a notification for the computing device;
based the notification, receive a request for information stored in the first portion of the volatile memory; and
provide, based on the request, the memory address and the identification of the type of memory access for processing by the computing device to make a configuration decision for the second portion of the volatile memory.

### Claim 11 (depends on 10)

The memory device of claim 10, wherein the command is for reading or writing second data from or to a non-volatile memory of the memory device, and the memory address identifies a physical address associated with the second data.

### Claim 12 (depends on 11)

The memory device of claim 11, wherein the controller is further configured to access the second portion of the volatile memory is based on the controller being configured to detect the command.

### Claim 13 (depends on 10)

The memory device of claim 10, wherein the command is for performing a computation by the memory device, and the controller is further configured to:
identify a result of the computation; and
store the result of the computation in the first portion of the volatile memory.

### Claim 14 (depends on 10)

The memory device of claim 10, wherein the controller is further configured to:
detect fullness of the first portion of the volatile memory; and
generate the notification based on the detecting of the fullness of the first portion of the volatile memory.

### Claim 15 (depends on 10)

The memory device of claim 10, wherein the first portion of the volatile memory is mapped to a first physical address space of the computing device and is configured to be accessed by the computing device via a memory access operation.

### Claim 16 (depends on 10)

The memory device of claim 10, wherein the controller is further configured to transmit second data to the computing device based on accessing the second portion of the volatile memory.

### Claim 17 (depends on 10)

The memory device of claim 10, wherein the configuration decision includes reconfiguring the second portion of the volatile memory for increasing a cache hit ratio.

### Claim 18 (depends on 17)

The memory device of claim 17, wherein the reconfiguring of the second portion includes modifying a cache algorithm.