# US 12,602,180 B2 · Storage device for reducing multi stream write imbalance and operation method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,602,180 B2 - Document ID: US12602180B2 - Status: Granted - Kind: B2 - Application number: 18/664,723 - Filed: 2024-05-15 - Published: 2025-05-29 - Granted: 2026-04-14 - Earliest claimed: 2023-11-28 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Taehyung Kwon; Seunghwan Ha; Shine Kim; Jeong-Eun Kim - Web page: https://patentgrep.com/patent/US12602180B2 ## CPC - G06F 3/0631: {by allocating resources to storage systems} - G06F 3/0604: {Improving or facilitating administration, e.g. storage management} - G06F 3/061: {Improving I/O performance} - G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling} - G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} - G06F 3/0688: {Non-volatile semiconductor memory arrays} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Disclosed is a method of operating a storage device including a plurality of chips, the method including: receiving a write request of stream data; checking a program status or a stream queue of each of the plurality of chips; based on a determination that there is at least one chip in a ready state with an empty stream queue among the plurality of chips, allocating the stream data to the at least one chip in the ready state; and based on a determination that there is no chip in the ready state with the empty stream queue among the plurality of chips, allocating the stream data to at least one chip based on a number of streams in a stream queue among the plurality of chips. ## Claims ### Claim 1 A method of operating a storage device comprising a plurality of chips, the method comprising: receiving a write request of stream data; checking a program status or a stream queue of each of the plurality of chips; based on a determination that there is at least one chip in a ready state with an empty stream queue among the plurality of chips, allocating the stream data to the at least one chip in the ready state; and based on a determination that there is no chip in the ready state among the plurality of chips, allocating the stream data to at least one chip based on a number of streams in a stream queue among the plurality of chips. ### Claim 2 (depends on 1) The method of claim 1, further comprising: generating a random sequence of the plurality of chips based on a determination that there is no chip in the ready state and there is no chip with the smallest number of streams in the stream queue among the plurality of chips; and allocating the stream data to the plurality of chips according to the random sequence. ### Claim 3 (depends on 1) The method of claim 1, wherein the at least one chip comprises two or more chips, and wherein the stream data has a same data property or a same data attribute. ### Claim 4 (depends on 1) The method of claim 1, wherein the program status of each of the plurality of chips comprises a word line offset corresponding to a programmed word line number of each of the plurality of chips. ### Claim 5 (depends on 4) The method of claim 4, further comprising: selecting candidate chips for allocating the stream data among the plurality of chips according to the word line offset. ### Claim 6 (depends on 5) The method of claim 5, wherein the candidate chips have a less number of programmed word lines among the plurality of chips. ### Claim 7 (depends on 6) The method of claim 6, further comprising: programming the stream data by randomly selecting at least one of the candidate chips that are selected for the allocating the stream data. ### Claim 8 (depends on 1) The method of claim 1, wherein the program status comprises a workload or a number of free blocks of each of the plurality of chips. ### Claim 9 A storage device comprising: a non-volatile memory device comprising a plurality of chips; and a storage controller configured to allocate a write-requested stream to at least one of the plurality of chips by referring to a program status and a stream queue state of each of the plurality of chips, wherein, based on a determination that at least one chip in a ready state with an empty stream queue exists among the plurality of chips, the storage controller is configured to allocate the write-requested stream to the at least one chip in the ready state, and wherein, based on a determination that there is no chip in the ready state with the empty stream queue among the plurality of chips, the storage controller is configured to allocate the write-requested stream to at least one chip based on a number of streams in a stream queue among the plurality of chips. ### Claim 10 (depends on 9) The storage device of claim 9, wherein the storage controller is configured to randomly select at least one of the plurality of chips and allocate the write-requested stream based on a determination that there is no chip in the ready state and there is no chip with the smallest number of streams in the stream queue. ### Claim 11 (depends on 9) The storage device of claim 9, wherein the at least one chip comprises two or more chips, and wherein the write-requested stream has a same data property or a same data attribute. ### Claim 12 (depends on 9) The storage device of claim 9, wherein the storage controller is configured to select at least one chip for allocating the write-requested stream from among the plurality of chips by referring to a word line offset corresponding to a word line number in which programming has been completed for each of the plurality of chips. ### Claim 13 (depends on 12) The storage device of claim 12, wherein the storage controller is configured to randomly select and allocate the write-requested stream to at least one of candidate chips having a less number of programmed word lines among the plurality of chips. ### Claim 14 (depends on 9) The storage device of claim 9, wherein the at least one chip comprises two or more chips, and wherein the write-requested stream has a same stream identifier allocated by a host device which transmits the write-requested stream to the storage controller. ### Claim 15 (depends on 14) The storage device of claim 14, wherein the program status comprises a workload or a number of free blocks of each of the plurality of chips. ### Claim 16 A method of operating a storage device comprising a plurality of NAND chips: receiving a write request for stream data; checking a word line offset indicating a programmed word line of each of the plurality of NAND chips; selecting candidate chips to write the stream data according to the word line offset; and programming the stream data into the candidate chips, wherein in the selecting the candidate chips, at least one chip having an unprogrammed first word line and at least one chip having an unprogrammed second word line to be programmed after the first word line are selected as the candidate chips among the plurality of NAND chips. ### Claim 17 (depends on 16) The method of claim 16, wherein the stream data is divided into the candidate chips and programmed. ### Claim 18 (depends on 16) The method of claim 16, wherein the stream data is programmed into any one of the candidate chips. ### Claim 19 (depends on 18) The method of claim 18, wherein the any one of the candidate chips is selected according to a random sequence. ### Claim 20 (depends on 19) The method of claim 19, wherein the random sequence is generated from a pseudo-random binary sequence (PRBS) algorithm or a linear feedback shift register (LFSR).