# US 12,602,164 B2 · Data storage device and method for thermal management through command selection > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,602,164 B2 - Document ID: US12602164B2 - Status: Granted - Kind: B2 - Application number: 18/676,911 - Filed: 2024-05-29 - Published: 2025-12-04 - Granted: 2026-04-14 - Earliest claimed: 2024-05-29 - Assignees: SanDisk Technologies LLC - Applicants: Sandisk Technologies, Inc. - Inventors: Roshini Hegde; Ramanathan Muthiah - Web page: https://patentgrep.com/patent/US12602164B2 ## CPC - G06F 3/0613: {in relation to throughput} - G06F 3/0653: {Monitoring storage devices or systems} - G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling} - G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A data storage device and method are disclosed for thermal management through command selection. In one embodiment, a data storage device is provided comprising a memory and one or more processors. The one or more processors, individually or in combination, are configured to: determine whether a temperature of the memory and/or a temperature of the one or more processors is above a threshold temperature; in response to determining that only the temperature of the memory is above the threshold temperature, execute a command whose execution uses relatively-more involvement of the one or more processors and relatively-less involvement of the memory; and in response to determining that only the temperature of the one or more processors is above the threshold temperature, execute a command whose execution uses relatively-more involvement of the memory and relatively-less involvement of the one or more processors. Other embodiments are provided. ## Claims ### Claim 1 A data storage device comprising: a memory comprising a plurality of memory dies, wherein the plurality of memory dies comprises a plurality of subsets of memory dies in sequential physical locations; and one or more processors, individually or in combination, configured to: determine that first and second commands are in a queue, wherein executing the first command uses relatively-more involvement of the one or more processors and relatively-less involvement of the memory, and wherein executing the second command uses relatively-more involvement of the memory and relatively-less involvement of the one or more processors; determine whether a first temperature of the memory and/or a second temperature of the one or more processors is above a threshold temperature; in response to determining that only the first temperature of the memory is above the threshold temperature: retrieve the first command, but not the second command, from the queue; execute the first command; and retrieve the second command from the queue only after the first temperature of the memory is no longer above the threshold temperature; and in response to determining that only the second temperature of the one or more processors is above the threshold temperature: retrieve the second command, but not the first command, and at least one additional command that uses relatively-more involvement of the memory and relatively-less involvement of the one or more processors from the queue; execute the second command and the at least one additional command in a sequence such that some, but not all, memory dies in each subset are operational, and wherein the memory dies that are operational are within a temperature limit; and retrieve the first command from the queue only after the second temperature of the one or more processors is no longer above the threshold temperature. ### Claim 2 (depends on 1) The data storage device of claim 1, wherein the one or more processors, individually or in combination, are further configured to perform full-device throttling in response to both the first temperature of the memory and the second temperature of the one or more processors being above the threshold temperature. ### Claim 3 (depends on 1) The data storage device of claim 1, wherein the one or more processors, individually or in combination, are further configured to perform a third command without throttling in response to a size of the third command being below a threshold. ### Claim 4 (depends on 1) The data storage device of claim 1, wherein the one or more processors, individually or in combination, are further configured to use a thermal credit point system to manage thermal throttling. ### Claim 5 (depends on 1) The data storage device of claim 1, wherein the one or more processors, individually or in combination, are further configured to use a feedback loop to determine a temperature delta when a command selection policy changes and impacts an overall temperature curve of the data storage device. ### Claim 6 (depends on 1) The data storage device of claim 1, wherein the one or more processors are part of a controller, and the one or more processors, individually or in combination, are further configured to reduce a third temperature of the controller by disabling one or more hardware components of the controller. ### Claim 7 (depends on 6) The data storage device of claim 6, wherein the one or more hardware components of the controller comprise: a hardware-aggregate write accumulator, a global access table search engine, a dedicated controller to interact with a host memory buffer/controller, and a hardware accelerator. ### Claim 8 (depends on 1) The data storage device of claim 1, wherein the one or more processors are part of a controller, and the one or more processors, individually or in combination, are further configured to reduce a third temperature of the controller by performing at least one of the following: reducing load on the controller by limiting a depth of the queue, reducing a frequency of the controller, modifying a flash interface module (FIM) toggle mode of the controller, or performing a memory trim. ### Claim 9 (depends on 1) The data storage device of claim 1, wherein the one or more processors, individually or in combination, are further configured to determine a most-impacted memory die and select commands that reduce a workload on the most-impacted memory die. ### Claim 10 (depends on 1) The data storage device of claim 1, wherein the command whose execution uses relatively-more involvement of the memory and relatively-less involvement of the one or more processors comprises a sequential command. ### Claim 11 (depends on 1) The data storage device of claim 1, wherein the data storage device comprises a solid-state drive. ### Claim 12 (depends on 1) The data storage device of claim 1, wherein the memory comprises a three-dimensional memory. ### Claim 13 A method comprising: performing in a data storage device comprising a memory and a controller, wherein the memory comprising a plurality of memory dies and wherein the plurality of memory dies comprises a plurality of subsets of memory dies in sequential physical locations: determining that first and second commands are in a submission queue, wherein executing the first command uses relatively-more involvement of the controller and relatively-less involvement of the memory, and wherein executing the second command uses relatively-more involvement of the memory and relatively-less involvement of the controller; determining that one, but not both, of a first temperature the memory and a second temperature of the controller is above a thermal throttling threshold temperature; in response to determining that only the first temperature of the memory is above the thermal throttling threshold temperature: retrieving the first command, but not the second command, from the submission queue; executing the first command; and retrieving the second command from the submission queue only after the first temperature of the memory is no longer above the thermal throttling threshold temperature; and in response to determining that only the second temperature of the controller is above the thermal throttling threshold temperature: retrieving the second command, but not the first command, and at least one additional command that uses relatively-more involvement of the memory and relatively-less involvement of the controller from the submission queue; executing the second command and the at least one additional command in a sequence such that some, but not all, memory dies in each subset are operational, and wherein the memory dies that are operational are within a temperature limit; and retrieving the first command from the submission queue only after the second temperature of the controller is no longer above the thermal throttling threshold temperature. ### Claim 14 (depends on 13) The method of claim 13, further comprising using a thermal credit point system to manage thermal throttling. ### Claim 15 (depends on 13) The method of claim 13, further comprising reducing the second temperature of the controller by disabling one or more hardware components of the controller. ### Claim 16 (depends on 15) The method of claim 15, wherein the one or more hardware components of the controller comprise: a hardware-aggregate write accumulator, a global access table search engine, a dedicated controller to interact with a host memory buffer/controller, and a hardware accelerator. ### Claim 17 (depends on 13) The method of claim 13, further comprising reducing the second temperature of the controller by performing at least one of the following: reducing load on the controller by limiting a depth of the submission queue, reducing a frequency of the controller, modifying a flash interface module (FIM) toggle mode of the controller, or performing a memory trim. ### Claim 18 (depends on 13) The method of claim 13, further comprising using temperature sensors to determine the first temperature of the memory and the second temperature of the controller. ### Claim 19 A data storage device comprising: a memory comprising a plurality of memory dies wherein the plurality of memory dies comprises a plurality of subsets of memory dies in sequential physical locations; one or more processors; and means for: determining that first and second commands are in a queue, wherein executing the first command uses relatively-more involvement of the one or more processors and relatively-less involvement of the memory, and wherein executing the second command uses relatively-more involvement of the memory and relatively-less involvement of the one or more processors; determining whether a first temperature of the memory and/or a second temperature of the one or more processors is above a threshold temperature; in response to determining that only the first temperature of the memory is above the threshold temperature: retrieving the first command, but not the second command, from the queue; executing the first command; and retrieving the second command from the queue only after the first temperature of the memory is no longer above the threshold temperature; and in response to determining that only the second temperature of the one or more processors is above the threshold temperature: retrieving the second command, but not the first command, and at least one additional command that uses relatively-more involvement of the memory and relatively-less involvement of the one or more processors from the queue; executing the second command and the at least one additional command in a sequence such that some, but not all, memory dies in each subset are operational, and wherein the memory dies that are operational are within a temperature limit; and retrieving the first command from the queue only after the second temperature of the one or more processors is no longer above the threshold temperature.