# US 12,602,158 B2 · Managing namespace mapping in a memory sub-system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,602,158 B2 - Document ID: US12602158B2 - Status: Granted - Kind: B2 - Application number: 18/940,127 - Filed: 2024-11-07 - Published: 2025-05-29 - Granted: 2026-04-14 - Earliest claimed: 2023-11-28 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Rishabh Dubey - Web page: https://patentgrep.com/patent/US12602158B2 ## CPC - G06F 3/0607: {by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device} - G06F 3/0644: {Management of space entities, e.g. partitions, extents, pools} - G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} - G06F 12/0246: {in block erasable memory, e.g. flash memory} - G06F 2212/7201: Logical to physical mapping or translation of blocks or pages - G06F 2212/7202: Allocation control and policies - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A system includes a first memory device; a second memory device; and a processing device, operatively coupled with the first memory device and the second memory device, to perform operations including: determining a size of the first memory device designated for storing a plurality of address mapping data structures, wherein each address mapping data structure of the plurality of address mapping data structures is associated with a corresponding namespace of a plurality of namespaces, wherein each namespace of the plurality of namespaces is associated with a corresponding region of a second memory device; associating a first address mapping granularity level with the first memory device for storing a first address mapping data structure of the plurality of address mapping data structures; determining a remaining available space of the first memory device by excluding a first size of the first address mapping data structure from the size of the first memory device, wherein the first size is calculated based on the first address mapping granularity level; and associating, in view of the remaining available space of the first memory device and a remaining available space of the second memory device, a second address mapping granularity level with the first memory device for storing a second address mapping data structure of the plurality of address mapping data structures. ## Claims ### Claim 1 A system comprising: a first memory device; a second memory device; and a processing device, operatively coupled with the first memory device and the second memory device, to perform operations comprising: determining a size of the first memory device designated for storing a plurality of address mapping data structures, wherein each address mapping data structure of the plurality of address mapping data structures is associated with a corresponding namespace of a plurality of namespaces, wherein each namespace of the plurality of namespaces is associated with a corresponding region of a second memory device; associating a first address mapping granularity level with the first memory device for storing a first address mapping data structure of the plurality of address mapping data structures; determining a remaining available space of the first memory device by excluding a first size of the first address mapping data structure from the size of the first memory device, wherein the first size is calculated based on the first address mapping granularity level; and associating, in view of the remaining available space of the first memory device and a remaining available space of the second memory device, a second address mapping granularity level with the first memory device for storing a second address mapping data structure of the plurality of address mapping data structures. ### Claim 2 (depends on 1) The system of claim 1, wherein the operations further comprise: receiving a request to modify one or more regions of the second memory device. ### Claim 3 (depends on 2) The system of claim 2, wherein the request to modify the one or more regions of the memory device comprises an instruction to add a region to the one or more regions. ### Claim 4 (depends on 2) The system of claim 2, wherein the request to modify the one or more regions of the memory device comprises an instruction to at least one of update or remove a region of the one or more regions. ### Claim 5 (depends on 1) The system of claim 1, wherein the operations further comprise: associating a first capacity with the second memory device, the first capacity being used as a first namespace of the plurality of namespaces, the first address mapping data structure being associated with the first namespace. ### Claim 6 (depends on 5) The system of claim 5, wherein the operations further comprise: determining the remaining available space of the second memory device by excluding the first capacity from a total capacity of the second memory device. ### Claim 7 (depends on 6) The system of claim 6, wherein the operations further comprise: associating, in view of the remaining available space of the second memory device, a second capacity with the second memory device, the second capacity being used as a second namespace of the plurality of namespaces, the second address mapping data structure being associated with the second namespace. ### Claim 8 (depends on 1) The system of claim 1, wherein determining the size of the first memory device associating the first address mapping granularity level determining the remaining available space of the first memory device, and associating the second address mapping granularity level are performed following at least one command. ### Claim 9 (depends on 1) The system of claim 1, wherein the operations further comprise: determining a target number of the plurality of namespaces; and associating each of a plurality of address mapping granularity levels in the target number with the first memory device for storing a corresponding address mapping data structure of the plurality of address mapping data structures. ### Claim 10 (depends on 1) The system of claim 1, wherein the operations further comprise: adjusting the first address mapping granularity level. ### Claim 11 (depends on 1) The system of claim 1, wherein the operations further comprise: responsive to determining that the remaining available space of the first memory device satisfies a threshold creation, notifying a user of an error. ### Claim 12 (depends on 1) The system of claim 1, wherein the first memory device comprises a volatile memory device, and wherein the second memory device comprise a non-volatile memory device. ### Claim 13 A method comprising: determining, by a processing device, a size of a first memory device designated for storing a plurality of address mapping data structures, wherein each address mapping data structure of the plurality of address mapping data structures is associated with a corresponding namespace of a plurality of namespaces, wherein each namespace of the plurality of namespaces is associated with a corresponding region of a second memory device; associating a first address mapping granularity level with the first memory device for storing a first address mapping data structure of the plurality of address mapping data structures; determining a remaining available space of the first memory device by excluding a first size of the first address mapping data structure from the size of the first memory device, wherein the first size is calculated based on the first address mapping granularity level; and associating, in view of the remaining available space of the first memory device and a remaining available space of the second memory device, a second address mapping granularity level with the first memory device for storing a second address mapping data structure of the plurality of address mapping data structures. ### Claim 14 A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising: determining a size of a first memory device designated for storing a plurality of address mapping data structures, wherein each address mapping data structure of the plurality of address mapping data structures is associated with a corresponding namespace of a plurality of namespaces, wherein each namespace of the plurality of namespaces is associated with a corresponding region of a second memory device; associating a first address mapping granularity level with the first memory device for storing a first address mapping data structure of the plurality of address mapping data structures; determining a remaining available space of the first memory device by excluding a first size of the first address mapping data structure from the size of the first memory device, wherein the first size is calculated based on the first address mapping granularity level; and associating, in view of the remaining available space of the first memory device and a remaining available space of the second memory device, a second address mapping granularity level with the first memory device for storing a second address mapping data structure of the plurality of address mapping data structures. ### Claim 15 (depends on 14) The non-transitory computer-readable storage medium of claim 14, wherein the processing device is to perform operations further comprising: receiving a request to modify one or more regions of the second memory device. ### Claim 16 (depends on 15) The non-transitory computer-readable storage medium of claim 15, wherein request to modify the one or more regions of the memory device comprises an instruction to add a region to the one or more regions. ### Claim 17 (depends on 15) The non-transitory computer-readable storage medium of claim 15, wherein the request to modify the one or more regions of the memory device comprises an instruction to at least one of update or remove a region of the one or more regions. ### Claim 18 (depends on 14) The non-transitory computer-readable storage medium of claim 14, wherein the processing device is to perform operations further comprising: associating a first capacity with the second memory device, the first capacity being used as a first namespace of the plurality of namespaces, the first address mapping data structure being associated with the first namespace. ### Claim 19 (depends on 18) The non-transitory computer-readable storage medium of claim 18, wherein the processing device is to perform operations further comprising: determining the remaining available space of the second memory device by excluding the first capacity from a total capacity of the second memory device. ### Claim 20 (depends on 19) The non-transitory computer-readable storage medium of claim 19, wherein the processing device is to perform operations further comprising: associating, in view of the remaining available space of the second memory device, a second capacity with the second memory device, the second capacity being used as a second namespace of the plurality of namespaces, the second address mapping data structure being associated with the second namespace.