Chip packaging method involving fabrication of wire bond and electroplated metal bonding pad through formation of metal gasket, passivation layer, metal seed layer, and photoresist

A chip packaging method, comprising the following steps:

• preparing a metal bonding pad, and enabling a surface of the metal bonding pad to have a solder area and a wire bonding area;
• applying solder in the solder area;
• connecting a welding part at a tail end of a metal wire into the wire bonding area;
• and
• melting the solder by heating and enabling the solder to enter the wire bonding area, so as to form a coating layer wrapping the welding part,
• wherein the step of preparing the metal bonding pad comprises the steps of:
• providing a substrate, and sequentially preparing a metal gasket and a passivation layer on a surface of the substrate, the passivation layer being provided with a window exposing part of a surface of the metal gasket to outside;
• preparing a metal seed layer on the surface of the metal gasket and a surface of the passivation layer;
• preparing a first photoresist layer on a surface of the metal seed layer;
• removing the first photoresist layer at a predetermined position to form a metal bonding pad forming area at the position;
• and
• manufacturing the metal bonding pad in the metal bonding pad forming area by an electroplating method, and
• wherein after preparation of the metal bonding pad is completed, the chip packaging method further comprises the steps of:
• preparing a second photoresist layer covering the metal bonding pad;
• removing the second photoresist layer in the solder area on the surface of the metal bonding pad;
• applying the solder in the solder area by the electroplating method;
• and
• removing the remaining second photoresist layer on the surface of the metal bonding pad, so that the wire bonding area is exposed to outside.