Package structure with enhancement structure and manufacturing method thereof

A package structure, comprising:

• a semiconductor die having an active side and a rear side opposing to the active side;
• a first redistribution circuit structure, disposed on the rear side and electrically coupled to the semiconductor die, wherein the first redistribution circuit structure further continuously extends over an entirety of the semiconductor die;
• a second redistribution circuit structure, disposed on the active side and electrically coupled to the semiconductor die;
• a thermal structure, disposed in the first redistribution circuit structure and thermally coupled to the semiconductor die, wherein the thermal structure is overlapped with the semiconductor die, wherein the thermal structure is laterally covered by a first dielectric layer of the first redistribution circuit structure, and a material of the first dielectric layer is different from a material of a second dielectric layer of the first redistribution circuit structure, wherein a sidewall of the first dielectric layer is substantially aligned with a sidewall of the second dielectric layer;
• a plurality of first conductive terminals, connected to the first redistribution circuit structure, the first redistribution circuit structure being between the plurality of first conductive terminals and the semiconductor die;
• and
• a plurality of second conductive terminals, connected to the second redistribution circuit structure, the second redistribution circuit structure being between the plurality of second conductive terminals and the semiconductor die.

A method of manufacturing a package structure, comprising:

• forming a first redistribution circuit structure;
• forming a thermal structure inside the first redistribution circuit structure, wherein the thermal structure is laterally covered by a first dielectric layer of the first redistribution circuit structure, and a material of the first dielectric layer is different from a material of a second dielectric layer of the first redistribution circuit structure;
• after forming the thermal structure inside the first redistribution circuit structure, disposing a semiconductor die on the first redistribution circuit structure, the semiconductor die being overlapped with and thermally coupled to the thermal structure, wherein the first redistribution circuit structure is disposed on a rear side of the semiconductor die and electrically connected to the semiconductor die;
• forming a second redistribution circuit structure on an active side of the semiconductor die, the second redistribution circuit structure electrically connecting the semiconductor die;
• disposing a plurality of first conductive terminals on the first redistribution circuit structure, the first redistribution circuit structure connecting to the plurality of first conductive terminals and being between the plurality of first conductive terminals and the semiconductor die;
• and
• disposing a plurality of second conductive terminals on the second redistribution circuit structure, the second redistribution circuit structure connecting to the plurality of second conductive terminals and being between the plurality of second conductive terminals and the semiconductor die.