Package substrate

Abstract

A package substrate according to an embodiment includes a first substrate; and a first chip mounted on the first substrate; wherein the first substrate includes: a first insulating layer including a first region overlapping the first chip in a vertical direction and a second region other than the first region; and a circuit pattern disposed on the first region and the second region of the first insulating layer; wherein the circuit pattern includes: a pad portion including a first portion disposed on an upper surface of the second region of the first insulating layer, a second portion buried in the first region of the first insulating layer, and a third portion including at least a part buried in the first region of the first insulating layer and connecting between the first portion and the second portion; wherein at least a part of the first chip is disposed in the first region of the first insulating layer; wherein the first region of the first insulating layer surrounds a lower surface and a side surface of the first chip, and wherein the first region and the second region of the first insulating layer are a single insulating layer.

Dependencies are inferred from the claim text.