# US 12,599,000 B2 · Non-volatile memory device including first and second monitoring channel structures and non-volatile memory system comprising the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,599,000 B2 - Document ID: US12599000B2 - Status: Granted - Kind: B2 - Application number: 17/702,400 - Filed: 2022-03-23 - Published: 2023-01-12 - Granted: 2026-04-07 - Earliest claimed: 2021-07-08 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Jung-Hwan Lee; Jin-Soo Lim - Web page: https://patentgrep.com/patent/US12599000B2 ## CPC - H10P 74/277: {Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers} - H10W 46/00: Marks applied to devices, e.g. for alignment or identification - H10B 41/27: the channels comprising vertical portions, e.g. U-shaped channels - H10B 41/41: of a memory region comprising a cell select transistor, e.g. NAND - H10B 43/27: the channels comprising vertical portions, e.g. U-shaped channels - H10B 43/40: characterised by the peripheral circuit region - H10W 46/301: {for alignment} - H10W 90/792: {between multiple chips} - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H10B: ELECTRONIC MEMORY DEVICES ## Abstract A non-volatile memory device and a non-volatile memory system comprising the same are provided. The non-volatile memory device includes a first stack in which a first conductive pattern and a first dielectric layer are alternately stacked in a first direction on a substrate, a second stack in which a second conductive pattern and a second dielectric layer are alternately stacked in the first direction on the first stack opposite the substrate, a first monitoring channel structure that penetrates the first stack in the first direction, and a second monitoring channel structure that penetrates the second stack in the first direction and is on the first monitoring channel structure. A width of a top of the first monitoring channel structure opposite the substrate is smaller than a width of a bottom of the second monitoring channel structure adjacent the top of the first monitoring channel structure. ## Claims ### Claim 1 A non-volatile memory device comprising: a first stack comprising first conductive patterns and first dielectric layers that are alternately stacked in a first direction on a substrate; a second stack comprising second conductive patterns and second dielectric layers that are alternately stacked in the first direction on the first stack opposite the substrate; a first monitoring channel structure that penetrates the first stack in the first direction; and a second monitoring channel structure that penetrates the second stack in the first direction and is on the first monitoring channel structure, wherein a top of the first monitoring channel structure is opposite the substrate and is in contact with a bottom of the second monitoring channel structure, and wherein a width of the top of the first monitoring channel structure opposite the substrate is smaller than a width of the bottom of the second monitoring channel structure. ### Claim 2 (depends on 1) The non-volatile memory device of claim 1, further comprising: a capping film on a top of the second monitoring channel structure opposite the bottom thereof, wherein a bottom of the capping film has a curved shape that protrudes toward the bottom of the second monitoring channel structure. ### Claim 3 (depends on 1) The non-volatile memory device of claim 1, further comprising: a first channel structure that penetrates the first stack in the first direction; and a second channel structure that penetrates the second stack in the first direction and is on the first channel structure, wherein a width of a top of the first channel structure opposite the substrate is greater than a width of a bottom of the second channel structure adjacent the top of the first channel structure. ### Claim 4 (depends on 1) The non-volatile memory device of claim 1, wherein the width of the top of the first monitoring channel structure is smaller than a narrowest width of the second monitoring channel structure. ### Claim 5 (depends on 1) The non-volatile memory device of claim 1, further comprising: a first channel structure that penetrates the first stack in the first direction; and a second channel structure that penetrates the second stack in the first direction and is placed on the first channel structure, wherein a width of a top of the first channel structure opposite the substrate is the same as a width of a top of the second channel structure opposite the top of the first channel structure. ### Claim 6 (depends on 1) The non-volatile memory device of claim 1, further comprising: a channel structure that penetrates the first stack and the second stack in the first direction, wherein the channel structure is configured to store data, and the first monitoring channel structure and the second monitoring channel structure are not configured to store data. ### Claim 7 (depends on 1) The non-volatile memory device of claim 1, wherein the first monitoring channel structure and the second monitoring channel structure are configured to store data. ### Claim 8 A non-volatile memory device comprising: a first stack comprising first conductive patterns and first dielectric layers that are alternately stacked in a first direction; a second stack comprising second conductive patterns and second dielectric layers that are alternately stacked in the first direction on the first stack; a first monitoring channel structure that penetrates the first stack in the first direction; a second monitoring channel structure that penetrates the second stack in the first direction and is on the first monitoring channel structure, wherein a top of the first monitoring channel structure is in contact with a bottom of the second monitoring channel structure; and a capping film on a top of the second monitoring channel structure opposite the bottom of the second monitoring channel structure, wherein a width of the top of the first monitoring channel structure is smaller than a width of the bottom of the second monitoring channel structure that is opposite the capping film, the first monitoring channel structure and the second monitoring channel structure comprise a data storage layer, a channel layer, and a buried insulating layer that are sequentially stacked along side walls of the first monitoring channel structure and side walls of the second monitoring channel structure that extend between the top and the bottom thereof. ### Claim 9 (depends on 8) The non-volatile memory device of claim 8, wherein a bottom of the capping film is adjacent the buried insulating layer and has a curved shape. ### Claim 10 (depends on 8) The non-volatile memory device of claim 8, further comprising: a first channel structure that penetrates the first stack in the first direction; and a second channel structure that penetrates the second stack in the first direction and is on the first channel structure, wherein a width of a top of the first channel structure opposite a substrate is greater than a width of a bottom of the second channel structure adjacent the top of the first channel structure. ### Claim 11 (depends on 8) The non-volatile memory device of claim 8, wherein the width of the top of the first monitoring channel structure is smaller than a narrowest width of the second monitoring channel structure. ### Claim 12 (depends on 8) The non-volatile memory device of claim 8, further comprising: a first channel structure that penetrates the first stack in the first direction; and a second channel structure that penetrates the second stack in the first direction and is on the first channel structure, wherein a width of a top of the first channel structure opposite a substrate is the same as a width of a top of the second channel structure opposite the top of the first channel structure. ### Claim 13 (depends on 8) The non-volatile memory device of claim 8, further comprising: a channel structure that penetrates the first stack and the second stack in the first direction, wherein the channel structure is configured to store data, and the first monitoring channel structure and the second monitoring channel structure are not configured to store data. ### Claim 14 (depends on 8) The non-volatile memory device of claim 8, wherein the first monitoring channel structure and the second monitoring channel structure are configured to store data. ### Claim 15 A non-volatile memory system comprising: a non-volatile memory device comprising: a first stack comprising first conductive patterns and first dielectric layers that are alternately stacked in a first direction on a substrate; a second stack comprising second conductive patterns and second dielectric layers that are alternately stacked in the first direction on the first stack opposite the substrate; a first monitoring channel structure that penetrates the first stack in the first direction; a second monitoring channel structure that penetrates the second stack in the first direction and is on the first monitoring channel structure, wherein a top of the first monitoring channel structure is opposite the substrate and is in contact with a bottom of the second monitoring channel structure, a width of the top of the first monitoring channel structure opposite the substrate being smaller than a width of the bottom of the second monitoring channel structure; a peripheral circuit comprising a decoder, a page buffer, and a logic circuit; and an I/O pad that is electrically connected to the peripheral circuit; and a controller that is electrically connected to the non-volatile memory device through the I/O pad and is configured to control the non-volatile memory device, wherein the first monitoring channel structure and the second monitoring channel structure are not configured to store data. ### Claim 16 (depends on 15) The non-volatile memory system of claim 15, further comprising: a capping film on the second monitoring channel structure opposite the bottom thereof; and a data storage layer, a channel layer, and a buried insulating layer stacked sequentially along side walls of the first monitoring channel structure and side walls of the second monitoring channel structure. ### Claim 17 (depends on 16) The non-volatile memory system of claim 16, wherein a bottom of the capping film adjacent the buried insulating layer has a curved shape. ### Claim 18 (depends on 15) The non-volatile memory system of claim 15, further comprising: a first channel structure that penetrates the first stack in the first direction; and a second channel structure that penetrates the second stack in the first direction and is on the first channel structure, wherein a width of a top of the first channel structure opposite the substrate is greater than a width of a bottom of the second channel structure adjacent the top of the first channel structure. ### Claim 19 (depends on 15) The non-volatile memory system of claim 15, further comprising: a channel structure that penetrates the first stack and the second stack in the first direction, wherein the channel structure is configured to store data. ### Claim 20 (depends on 15) The non-volatile memory system of claim 15, wherein the first monitoring channel structure extends from the bottom of the second monitoring channel structure to the substrate, and wherein the width of the top of the first monitoring channel structure is smaller than a narrowest width of the second monitoring channel structure.