# US 12,598,993 B2 · Three-dimensional integrated circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,598,993 B2 - Document ID: US12598993B2 - Status: Granted - Kind: B2 - Application number: 18/111,427 - Filed: 2023-02-17 - Published: 2023-09-07 - Granted: 2026-04-07 - Earliest claimed: 2022-02-21 - Assignees: KV Innovations, LLC - Applicants: Kambix Innovations, LLC - Inventors: Kambiz Vafai; Sainan Lu - Web page: https://patentgrep.com/patent/US12598993B2 ## CPC - H10W 40/73: for cooling by change of state - H10W 40/10: Arrangements for heating - H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps - H10W 72/30: Die-attach connectors - H10W 72/851: {Dispositions of multiple connectors or interconnections} - H10W 90/00: Package configurations - H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills - H10W 90/288: {characterised by arrangements for thermal management of the stacked chips} - H10W 90/722: {between stacked chips} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/726: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W 90/732: {between stacked chips} - H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A three-dimensional integrated circuit device can include a group of die, a device layer and a thermal interface material formed above the substrate. A heat spreader can be located above the die, the device layer and the thermal interface material. The heat spreader can include a heat pipe comprising a rectangular-shaped heat pipe or disk-shaped heat pipe. A heat sink can be located above the heat spreader. The heat sink can include the heat pipe comprising the rectangular-shaped heat pipe or the disk-shaped heat pipe. ## Claims ### Claim 1 A three-dimensional (3D) integrated circuit device, comprising: a thermal interface material layer configured above or from a substrate; a plurality of die, a device layer and a micro-bump thermal interface material layer formed above thermal interface material layer; a heat spreader located above the plurality of die, the device layer and the thermal interface material, the heat spreader comprising a flat-shaped heat pipe selected from a rectangular-shaped heat pipe and a disk-shaped heat pipe; and a heat sink located above the heat spreader, the heat sink selected from the rectangular-shaped heat pipe and the disk-shaped heat pipe, wherein the flat-shaped heat pipe is employed as both the heat spreader and the heat sink to improve a thermal performance of the 3D IC. ### Claim 2 (depends on 1) The 3D integrated circuit device of claim 1, wherein the flat-shaped heat pipe provides an effective thermal conductivity of at least about 5000 W/m·K. ### Claim 3 (depends on 1) The 3D integrated circuit device of claim 1, wherein the flat-shaped heat pipe has a weight that is at least seven times lighter than a copper heat spreader of the same size. ### Claim 4 (depends on 1) The 3D integrated circuit device of claim 1, wherein the 3D integrated circuit device with the flat-shaped heat pipe is operable at power dissipation levels of at least 300 W without exceeding an operating junction temperature of 373 K. ### Claim 5 (depends on 1) The 3D integrated circuit device of claim 1, wherein the plurality of die is interconnected using a core-concentrated TSV arrangement. ### Claim 6 (depends on 1) The 3D integrated circuit device of claim 1, wherein the flat-shaped heat pipe reduces average thermal resistance of the 3D integrated circuit device to about 0.0004 K/W or less. ### Claim 7 (depends on 1) The 3D integrated circuit device of claim 1, wherein the flat-shaped heat pipe is configured to reduce hotspot temperatures for high-power processor applications. ### Claim 8 (depends on 1) The 3D integrated circuit device of claim 1, wherein the 3D integrated circuit device is implemented in a chip-on-chip (CoC) arrangement, a multi-layer 3D IC, a multi-chip package, or a package-on-package configuration. ### Claim 9 (depends on 1) The 3D integrated circuit device of claim 1, wherein: the plurality of die is interconnected using a core-concentrated TSV arrangement; the flat-shaped heat pipe is configured to reduce hotspot temperatures for high-power processor applications; and the 3D integrated circuit device is implemented in a chip-on-chip (CoC) arrangement, a multi-layer 3D IC, a multi-chip package, or a package-on-package configuration. ### Claim 10 (depends on 9) The 3D integrated circuit device of claim 9, wherein the flat-shaped heat pipe reduces average thermal resistance of the 3D integrated circuit device to about 0.0004 K/W or less. ### Claim 11 (depends on 9) The 3D integrated circuit device of claim 9, wherein the 3D integrated circuit device with the flat-shaped heat pipe is operable at power dissipation levels of at least 300 W without exceeding an operating junction temperature of 373 K. ### Claim 12 (depends on 1) The 3D integrated circuit device of claim 1, wherein the flat-shaped heat pipe is configured to function simultaneously as a heat spreader and a heat sink. ### Claim 13 (depends on 1) The 3D integrated circuit device of claim 1, wherein the flat-shaped heat pipe comprises a wick structure extending across a flat surface of the heat pipe. ### Claim 14 A three-dimensional (3D) integrated circuit device, comprising: a thermal interface material layer configured above or from a substrate; a plurality of die, a device layer and a micro-bump thermal interface material layer formed above thermal interface material layer, the plurality of die interconnected using a core-concentrated TSV arrangement; a heat spreader located above the plurality of die, the device layer and the thermal interface material, the heat spreader comprising a flat-shaped heat pipe selected from a rectangular-shaped heat pipe and a disk-shaped heat pipe, the flat-shaped heat pipe configured to reduce hotspot temperatures for high-power processor applications; and a heat sink located above the heat spreader, the heat sink selected from the rectangular-shaped heat pipe and the disk-shaped heat pipe, wherein the flat-shaped heat pipe is employed as both the heat spreader and the heat sink to improve a thermal performance of the 3D IC. ### Claim 15 (depends on 14) The 3D integrated circuit device of claim 14, wherein the 3D integrated circuit device with the flat-shaped heat pipe is operable at power dissipation levels of at least 300 W without exceeding an operating junction temperature of 373 K. ### Claim 16 (depends on 14) The 3D integrated circuit device of claim 14, wherein the flat-shaped heat pipe is configured to function simultaneously as a heat spreader and a heat sink. ### Claim 17 (depends on 14) The 3D integrated circuit device of claim 14, wherein the flat-shaped heat pipe comprises a wick structure extending across a flat surface of the heat pipe. ### Claim 18 A method of operating a three-dimensional (3D) integrated circuit device, the method comprising: providing a 3D integrated circuit device comprising: a substrate; a thermal interface material (TIM) layer formed above the substrate; a plurality of die and a device layer stacked above the TIM layer and interconnected by micro-bumps; a heat spreader located above the plurality of die and the device layer, the heat spreader comprising a flat-shaped heat pipe selected from a rectangular-shaped heat pipe and a disk-shaped heat pipe; and a heat sink located above the heat spreader, the heat sink comprising a flat-shaped heat pipe selected from the rectangular-shaped heat pipe and the disk-shaped heat pipe; providing electrical power to the plurality of die to operate the device layer; and dissipating heat generated by the plurality of die through the TIM layer, the flat-shaped heat pipe heat spreader, and the flat-shaped heat pipe heat sink, thereby reducing hotspot temperatures in the 3D integrated circuit device.