Front end of line processing compatible thermally stable buried power rails

A semiconductor device comprising:

• a semiconductor substrate comprising at least one non-recessed semiconductor portion;
• a dielectric isolation region surrounding, but not located on top of, the at one non-recessed semiconductor portion;
• at least one buried power rail within the dielectric isolation region, wherein the at least one buried power rail is divided into a plurality of rail segments, wherein each rail segment of the plurality of rail segments has a length smaller than a total length of the at least one buried power rail, and each rail segment has a rail segment length to rail segment width ratio of 4-10;
• an interconnect extending through the semiconductor substrate and in contact with each rail segment of the plurality of rail segments of the at least one buried power rail;
• and
• a back side power distribution network (BSPDN) below in the semiconductor substrate, wherein the at least one buried power rail is electrically connected to the BSPDN by the interconnect.

A method of forming a semiconductor device comprising:

• forming a dielectric isolation region surrounding, but not located on top of, a non-recessed semiconductor portion of a semiconductor substrate;
• forming a plurality of rail segment trenches within the dielectric isolation region;
• and
• forming a plurality of rail segments, each of the plurality of rail segments in one of the plurality of rail segment trenches, wherein the plurality of rail segments comprise a buried power rail and each of the plurality of rail segments has a length smaller than a total length of the buried power rail, and each rail segment has a rail segment length to rail segment width ratio of 4-10.