Semiconductor device having a source/drain contact connected to a back-side power rail by a landing pad and a through electrode

A semiconductor device, comprising:

• a substrate including a first surface and a second surface, the first surface and the second surface being opposite to each other;
• a first active pattern extending in a first direction on the first surface of the substrate;
• a second active pattern extending in the first direction on the first surface of the substrate, the second active pattern being spaced apart from the first active pattern in a second direction intersecting the first direction;
• a third active pattern extending in the first direction on the first surface of the substrate, the third active pattern being spaced apart from the first active pattern in the first direction;
• a gate electrode extending in the second direction on the first active pattern and the second active pattern;
• a source/drain contact connected to a source/drain region on one side of the gate electrode of the first active pattern in the first direction;
• a power rail on the second surface of the substrate, the power rail being configured to provide a voltage to the substrate;
• a through electrode connected to the power rail and penetrating the substrate;
• and
• a landing pad in contact with the source/drain contact and the through electrode, the landing pad being between the first active pattern and the third active pattern in the first direction,
• wherein the source/drain contact includes a first portion that is in contact with the source/drain region, and a second portion that extends from the first portion in the first direction, and is in contact with the landing pad.

A semiconductor device, comprising:

• a substrate including a first surface and a second surface, the first surface and the second surface being opposite to each other;
• an active pattern extending in a first direction on the first surface of the substrate;
• a field insulating film wrapping at least part of a side wall of the active pattern;
• a gate electrode extending in a second direction intersecting the first direction, on the active pattern;
• a source/drain contact including a first portion connected to a source/drain region of the active pattern, and a second portion extending from the first portion in the first direction or the second direction;
• a silicide film between the source/drain region and the source/drain contact;
• a power rail on the second surface of the substrate, the power rail being configured to provide a voltage to the substrate;
• a back wiring on the second surface of the substrate and connected to the power rail;
• a through electrode connected to the power rail and penetrating the substrate and the field insulating film;
• a landing pad on the field insulating film, the landing pad being in contact with the through electrode and the second portion of the source/drain contact, and the landing pad including a same material as the gate electrode;
• and
• a front wiring on the first surface of the substrate and connected to the source/drain contact,
• wherein an upper surface of the through electrode is above uppermost surface of the field insulating film.