Top via on subtractively etched conductive line

A semiconductor device including a self-aligned top via, comprising:

• a substrate;
• a first structure disposed on the substrate, the first structure including a self-aligned via disposed on a first recessed conductive line, the first recessed conductive line having a tapered geometry with a top width being more narrow than a bottom width resulting from a subtractive etch process, the self-aligned via having a top surface;
• and
• a self-aligned top via opening formed on the first recessed conductive line;
• and
• a second structure disposed on the substrate, the second structure including a plug disposed on a second conductive line, the second recessed conductive line having a tapered geometry with a top width being more narrow than a bottom width resulting from the subtractive etch process, the plug having a top surface in a same plane as the top surface of the self-aligned via.