Substrate contact in wafer backside

A pixel array, comprising:

• a substrate having a first side, a second side opposite the first side, and a first thickness measured from the first side to the second side;
• a deep trench isolation (DTI) structure positioned within the substrate, the DTI structure comprising a plurality of DTI segments aligned in a grid pattern dividing the substrate into a plurality of pixel regions;
• a plurality of photodetectors positioned within the substrate, the plurality of photodetectors being arranged within the plurality of pixel regions, respectively, when viewed from a top down perspective;
• a plurality of floating diffusion regions on the first side of the substrate, the plurality of floating diffusion regions being arranged within the plurality of pixel regions, respectively, when viewed from the top down perspective;
• and
• a plurality of body contact regions on the second side of the substrate and extending up to a first distance into the substrate, wherein the first distance is up to 20% of the first thickness when viewed from a cross sectional perspective, wherein the plurality of body contact regions are arranged within the plurality of pixel regions, respectively, when viewed from the top down perspective, wherein the plurality of body contact regions are disposed outside of the plurality of DTI segments when viewed from the top down perspective, and
• wherein, for individual body contact regions of the plurality of body contact regions in corresponding individual pixel regions of the plurality of pixel regions, the individual body contact regions are closer to first intersections of the DTI segments defining the corresponding individual pixel regions than second intersections of the DTI segments defining the corresponding individual pixel regions when viewed from the top down perspective.

A method of forming an integrated chip, comprising:

• doping a first region of a substrate to form a photodetector in a first pixel region;
• doping a second region on a first side of the substrate to form a floating diffusion region in the first pixel region;
• forming a first interconnect structure on the first side of the substrate, the first interconnect structure being electrically coupled to the floating diffusion region;
• forming a deep trench isolation (DTI) structure on a second side of the substrate opposite the first side of the substrate and comprising a plurality of DTI segments surrounding the first pixel region with outer sidewalls comprising a dielectric material and interfacing a semiconductor material of the first pixel region;
• doping a third region on the second side of the substrate after forming the DTI structure to form a first body contact region in the semiconductor material of the first pixel region, wherein the first body contact region is surrounded by the outer sidewalls of the plurality of DTI segments that interface the semiconductor material of the first pixel region;
• and
• forming a second interconnect structure on the second side of the substrate, electrically coupled to the first body contact region.