Co-doping of thin film transistors

An integrated circuit, comprising:

• a plurality of semiconductor devices;
• an interconnect region above the plurality of semiconductor devices, the interconnect region comprising a plurality of stacked interconnect layers;
• and
• a thin film transistor (TFT) structure within one or more interconnect layers of the plurality of stacked interconnect layers, the TFT structure comprising
• a gate electrode,
• a gate dielectric on the gate electrode,
• a semiconductor region on the gate dielectric,
• one or more dielectric layers over the semiconductor region, and
• first and second conductive contacts that extend through the one or more dielectric layers and contact respective first and second portions of the semiconductor region;
• wherein the semiconductor region includes a dopant profile having two or more insulating dopant elements or one or more insulating dopant compounds, the dopant profile extending along an entire width of the semiconductor region, including both the first portion of the semiconductor region and the second portion of the semiconductor region.

An integrated circuit, comprising:

• a plurality of semiconductor devices;
• an interconnect region above the plurality of semiconductor devices, the interconnect region comprising a plurality of stacked interconnect layers;
• and
• a thin film transistor (TFT) structure within the one or more interconnect layers of the plurality of stacked interconnect layers, the TFT structure comprising
• a gate electrode,
• a gate dielectric on the gate electrode,
• a metal oxide semiconductor region on the gate dielectric,
• one or more dielectric layers over the metal oxide semiconductor region, and
• first and second conductive contacts that extend through the one or more dielectric layers and contact respective first and second portions of the metal oxide semiconductor region;
• wherein the metal oxide semiconductor region includes a dopant profile having a concentration between 1% and 10% of two or more insulating dopant elements or of one or more insulating dopant compounds, the dopant profile extending along an entire width of the semiconductor region, including both the first portion of the semiconductor region and the second portion of the semiconductor region.