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US 12,598,799 B2Granted
High voltage finger layout transistor
AssigneeTexas Instruments Incorporated
InventorsJungwoo Joh, Sunglyong Kim, Seetharaman Sridhar, Sameer Pendharkar, James Craig Ondrusek, Srikanth Krishnan
Life of this patent
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Abstract
An integrated circuit, including a source region, a drain region, a channel region between the source region and the drain region, and a gate for inducing a conductive path through the channel region. The integrated circuit also includes structure, proximate a curved length of the gate, for inhibiting current flow along a portion of the channel region.
Claims12
An integrated circuit, comprising:
- a substrate;
- a source region in the substrate;
- a drain region in the substrate, wherein the drain region includes a high conductivity region formed adjacent a drift region;
- a channel region between the source region and the drain region;
- a gate on the substrate including at least a first linear portion, a second linear portion parallel to the first linear portion, and a curved portion connecting the first linear portion and the second linear portion;
- and
- structure, proximate the curved portion of the gate, for inhibiting current flow along a portion of the channel region,
- wherein the structure includes an insulator having a curved shape extending along the curved portion of the gate from an end adjacent the first linear portion of the gate to an end adjacent the second linear portion of the gate and a depth of the insulator in the substrate is greater than or equal to a depth of the source region in the substrate and a portion of the insulator directly contacts the high conductivity region.
5 more elements
An integrated circuit, comprising:
- a substrate;
- a drain region in the substrate, wherein the drain region includes a high conductivity region formed adjacent a drift region;
- a gate on the substrate including at least a first linear portion, a second linear portion parallel to the first linear portion, and a curved portion connecting the first linear portion and the second linear portion;
- a source region in the substrate surrounding portions of the drain region and the gate;
- and
- structure, proximate the gate, for inhibiting current flow along a portion of a channel region between the source region and the drain region,
- wherein the structure includes an insulator having a curved shape extending along the curved portion of the gate from an end adjacent the first linear portion of the gate to an end adjacent the second linear portion of the gate and a depth of the insulator in the substrate is greater than or equal to a depth of the source region in the substrate and a portion of the insulator directly contacts the high conductivity region.
4 more elements
A method of making an integrated circuit, comprising:
- providing a source region in a substrate;
- providing a drain region in the substrate, wherein the drain region includes a high conductivity region formed adjacent a drift region;
- providing a channel region between the source region and the drain region;
- providing a gate on the substrate including at least a first linear portion, a second linear portion parallel to the first linear portion, and a curved portion connecting the first linear portion and the second linear portion;
- and
- providing structure, proximate the curved portion of the gate, for inhibiting current flow along a portion of the channel region,
- wherein the structure includes an insulator having a curved shape extending along the curved portion of the gate from an end adjacent the first linear portion of the gate to an end adjacent the second linear portion of the gate and a depth of the insulator in the substrate is greater than or equal to a depth of the source region in the substrate and a portion of the insulator directly contacts the high conductivity region.
4 more elements
Dependencies are inferred from the claim text.