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US 12,598,798 B2Granted
Semiconductor structure and manufacturing method thereof
AssigneeChangxin Memory Technologies, Inc.
InventorYizhi Zeng
Life of this patent
Estimating the term…
Abstract
The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate and a contact structure. The substrate includes a shallow trench isolation (STI) structure and active structures separated by the STI structure. The contact structure includes a first contact structure and a second contact structure that are laminated, where the first contact structure covers a part of a top surface and a part of a side wall of the active structure.
Claims18
A semiconductor structure, comprising:
- a substrate, comprising a shallow trench isolation (STI) structure, and active structures separated by the STI structure, wherein the active structure comprises a first source/drain portion located in a middle of the active structure and a second source/drain portion located at both sides of the first source/drain portion;
- and a top surface of the first source/drain portion is lower than a top surface of the second source/drain portion;
- and
- a contact structure, wherein the contact structure comprises a first contact structure and a second contact structure that are laminated;
- wherein the first contact structure covers a part of a top surface and a part of a side wall of the active structure, the first source/drain portion of the active structure is connected to the contact structure, and the first contact structure covers the top surface and a part of a side wall of the first source/drain portion of the active structure.
2 more elements
A manufacturing method of a semiconductor structure, comprising:
- providing a substrate, wherein the substrate comprises an STI structure and active structures separated by the STI structure;
- patterning the substrate to form contact holes, wherein each of the contact holes exposes a part of a top surface and a part of a side wall of the active structure;
- wherein the contact holes comprise a first contact hole and a second contact hole;
- forming a first contact structure, wherein the first contact structure covers the part of the top surface and the part of the side wall of the active structure;
- and
- forming a second contact structure, wherein the second contact structure covers the first contact structure, and jointly forms a contact structure with the first contact structure;
- wherein after the forming a first contact structure, the manufacturing method further comprises:
- performing a rapid thermal annealing;
- and
- wherein patterning the substrate to form contact holes further comprises:
- patterning the substrate to form the first contact holes, wherein each of the first contact holes exposes the active structure and the STI structure;
- and etching back the STI structure exposed in the first contact hole, to form the second contact hole that exposes a part of the side wall of the active structure.
9 more elements
A semiconductor structure, comprising:
- a substrate, comprising a shallow trench isolation (STI) structure, and active structures separated by the STI structure;
- a contact structure, wherein the contact structure comprises a first contact structure and a second contact structure that are laminated, the first contact structure comprises a silicide layer;
- and the second contact structure comprises a polysilicon layer;
- wherein the first contact structure covers a part of a top surface and a part of a side wall of the active structure;
- and
- a bit line structure, wherein the bit line structure is located above the second contact structure and is connected to the second contact structure;
- and
- the bit line structure comprises a barrier layer and a conductive layer that are connected to the second contact structure, and a sidewall located on side walls of the barrier layer and the conductive layer.
5 more elements
Dependencies are inferred from the claim text.