Semiconductor device having doped gate dielectric layer and method for forming the same

A method for manufacturing a semiconductor device, the method comprising:

• forming a dielectric layer over a first channel region and over a second channel region;
• doping a first dipole dopant and a second dipole dopant into the dielectric layer over the first channel region to form a first gate dielectric layer over the first channel region, wherein the first dipole dopant over the first channel region is annealed one or more times more than the second dipole dopant over the first channel region;
• after forming the first gate dielectric layer, forming a first dipole layer comprising a third dipole dopant over the dielectric layer over the second channel region;
• performing a first anneal process to diffuse the third dipole dopant from the first dipole layer into the dielectric layer over the second channel region to form a second gate dielectric layer over the second channel region;
• removing remaining portions of the first dipole layer;
• and
• forming a gate electrode layer over the first gate dielectric layer and the second gate dielectric layer.

A method of manufacturing a semiconductor device, the method comprising:

• forming a first dielectric layer over a channel region;
• doping the first dielectric layer over the channel region with dipole dopants, wherein doping the first dielectric layer comprises sequentially performing a plurality of cycles, wherein each cycle comprises:
• forming a dipole layer comprising dipole dopants over the first dielectric layer vertically over the channel region;
• annealing the dipole layer and the first dielectric layer to drive the dipole dopants into the first dielectric layer vertically over the channel region;
• and
• removing remaining portions of the dipole layer;
• and
• after doping the first dielectric layer, forming a gate electrode over the first dielectric layer.