Structure and formation method of package with hybrid interconnection
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTsung-Fu Tsai, Szu-Wei Lu, Shih-Peng Tai, Chen-Hua Yu
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Abstract
A package structure and a formation method are provided. The method includes providing a semiconductor substrate and bonding a first chip structure on the semiconductor substrate through metal-to-metal bonding and dielectric-to-dielectric bonding. The method also includes bonding a second chip structure over the semiconductor substrate through solder-containing bonding structures. The method further includes forming a protective layer surrounding the second chip structure. A portion of the protective layer is between the semiconductor substrate and a bottom of the second chip structure.
Claims20
A method for forming a package structure, comprising:
- providing a semiconductor substrate;
- bonding a first chip structure on the semiconductor substrate through metal-to-metal bonding and dielectric-to-dielectric bonding;
- bonding a second chip structure over the semiconductor substrate through solder-containing bonding structures;
- and
- forming a protective layer surrounding the second chip structure, wherein a portion of the protective layer is between the semiconductor substrate and a bottom of the second chip structure.
A method for forming a package structure, comprising:
- providing a semiconductor substrate with an interconnection structure;
- bonding a first chip structure directly on the interconnection structure of the semiconductor substrate;
- bonding a second chip structure over the interconnection structure of the semiconductor substrate, wherein a first bottom surface of the first chip structure is closer to the semiconductor substrate than a second bottom surface of the second chip structure;
- and
- forming an encapsulant layer surrounding the first chip structure and the second chip structure.
A package structure, comprising:
- a semiconductor substrate;
- an interconnection structure over the semiconductor substrate;
- a first chip structure bonded to the interconnection structure through dielectric-to-dielectric bonding and metal-to-metal bonding;
- a second chip structure bonded to the interconnection structure through solder-containing bonding structures;
- and
- an encapsulant layer surrounding the first chip structure and the second chip structure.
Dependencies are inferred from the claim text.