Semiconductor device
AssigneeSamsung Electronics Co., Ltd.
InventorsDong-Wan Kim, Keonhee Park, Dong-Sik Park, Joonsuk Park, Jihoon Chang, Hyeon-Woo Jang
Life of this patent
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Abstract
A semiconductor device may include a substrate including a cell region, a peripheral region, and a boundary region between the cell region and the peripheral region, bit lines provided on the cell region and extended in a first direction parallel to a top surface of the substrate, bit line capping patterns provided on the bit lines, and a boundary pattern provided on the boundary region. End portions of the bit lines may be in contact with a first interface of the boundary pattern, and the bit line capping patterns may include the same material as the boundary pattern.
Claims19
A semiconductor device, comprising:
- a substrate including a cell region, a peripheral region, and a boundary region between the cell region and the peripheral region;
- bit lines provided on the cell region and extended in a first direction parallel to a top surface of the substrate;
- bit line capping patterns provided on the bit lines;
- a boundary pattern provided on the boundary region;
- bit line spacers contacting sides of the bit lines, and
- cell trenches provided between the bit lines and extended from the cell region to the boundary region in the first direction,
- wherein end portions of the bit lines are in contact with a first interface of the boundary pattern,
- the bit line spacers extend through the cell region and beyond the end portions of the bit lines in the first direction,
- the bit line capping patterns comprise the same material as the boundary pattern, and
- wherein the cell trenches comprise first end portions which are extended into the boundary pattern.
A semiconductor device, comprising:
- a substrate including a cell region, a peripheral region, and a boundary region between the cell region and the peripheral region;
- bit lines provided on the cell region and extended in a first direction parallel to a top surface of the substrate;
- bit line capping patterns on the bit lines;
- cell trenches provided between the bit lines and extended from the cell region to the boundary region in the first direction;
- and
- a boundary pattern, including a first interface, provided on the boundary region,
- wherein the cell trenches comprise first end portions which are extended into the boundary pattern,
- wherein the bit line capping patterns comprise the same material as the boundary pattern, and
- inner sides of the first end portions of the cell trenches are defined by the first interface of the boundary pattern.
A semiconductor device, comprising:
- a substrate including a cell region, a peripheral region, and a boundary region between the cell region and the peripheral region;
- bit lines provided on the cell region and extended in a first direction parallel to a top surface of the substrate;
- bit line capping patterns on the bit lines;
- storage node contacts disposed between the bit lines;
- landing pads provided on the bit line capping patterns and the storage node contacts, and electrically connected to the storage node contacts;
- capacitors provided on the landing pads and electrically connected to the landing pads;
- cell trenches provided between the bit lines and extended from the cell region to the boundary region in the first direction;
- and
- a boundary pattern provided on the boundary region,
- wherein end portions of the bit lines are in contact with a first interface of the boundary pattern,
- the cell trenches comprise first end portions extended into the boundary pattern,
- the bit line capping patterns comprise the same material as the boundary pattern, and
- inner sides of the first end portions of the cell trenches are defined by first interfaces of the boundary pattern.
Dependencies are inferred from the claim text.