Programmable equalizer

An equalizer, comprising:

• a first transistor and a second transistor both coupled to a first differential input (IP);
• a third transistor and a fourth transistor both coupled to a second differential input (IN);
• a first impedance (ZE1) coupled between the second transistor and the third transistor;
• a second impedance (ZE2) coupled between the first transistor and the fourth transistor;
• a first load resistance (RL1) coupled to a first supply node;
• a second load resistance (RL2) coupled to the first supply node;
• a current steering circuit coupled between the first, second, third and fourth transistors and the first and second load resistances;
• a first bias current source coupled to the first transistor, the second impedance and a second supply node;
• a second bias current source coupled to the second transistor, the first impedance and the second supply node;
• a third bias current source coupled to the third transistor, the first impedance and the second supply node;
• a fourth bias current source coupled to the fourth transistor, the second impedance and the second supply node;
• and
• a controller;
• wherein the controller is configured to adjust the current steering circuit by generating a first control signal and a second control signal and applying the first control signal and the second control signal to the current steering circuit and by controlling the first bias current source, the second bias current source, the third bias current source, and the fourth bias current source through a plurality of control lines to route a first percentage of an amplification current through the first impedance (ZE1) and a second percentage of the amplification current through the second impedance (ZE2).