# US 12,597,866 B2 · Dynamic current rectifier > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,597,866 B2 - Document ID: US12597866B2 - Status: Granted - Kind: B2 - Application number: 18/384,547 - Filed: 2023-10-27 - Published: 2025-05-01 - Granted: 2026-04-07 - Earliest claimed: 2023-10-27 - Assignees: Northrop Grumman Systems Corporation - Applicants: Northrop Grumman Systems Corporation - Inventors: Bouchaib Cherif; Philippe Olivier-Marie Pouliquen - Web page: https://patentgrep.com/patent/US12597866B2 ## CPC - H02M 7/05: {Capacitor coupled rectifiers} - H02M 7/217: using semiconductor devices only - G05F 3/262: {using field-effect transistors only} - H02M 1/088: for the simultaneous control of series or parallel connected semiconductor devices - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) - G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES ## Abstract A dynamic current rectifier includes an input terminal for receiving an input current, an output terminal for outputting a rectified output current, a first current mirror, a second current mirror, a first switch having a first terminal coupled to the input terminal and a second terminal coupled to the first current mirror, a second switch having a first terminal coupled to the output terminal and a second terminal coupled to the first current mirror, a third switch having a first terminal coupled to the input terminal and a second terminal coupled to the second current mirror, and a fourth switch having a first terminal coupled to the output terminal and a second terminal coupled to the second current mirror. ## Claims ### Claim 1 A dynamic current rectifier, comprising: an input terminal configured to receive an input current; an output terminal configured to output a rectified output current; a first current mirror configured to generate a mirrored current; a second current mirror configured to generate a mirrored current; a first switch comprising a first terminal coupled to the input terminal and a second terminal coupled to the first current mirror; a second switch comprising a first terminal coupled to the output terminal and a second terminal coupled to the first current mirror; a third switch comprising a first terminal coupled to the input terminal and a second terminal coupled to the second current mirror; a fourth switch comprising a first terminal coupled to the output terminal and a second terminal coupled to the second current mirror; a fifth switch comprising a first terminal coupled to the output terminal, a second terminal coupled to the input terminal, and a gate terminal; a sixth switch comprising a first terminal coupled to the output terminal, a second terminal coupled to the first terminals of the second and fourth switches, and a gate terminal; and a controller configured to provide control signals to the first through sixth switches, wherein: the controller provides the gate terminal of the fifth switch with a first output control signal, and the fifth switch is configured to be turned on at a polarity of the input current and to be turned off at an opposite polarity of the input current, and the controller provides the gate terminal of the sixth switch with a second output control signal. ### Claim 2 (depends on 1) The dynamic current rectifier of claim 1 wherein each of the first and second current mirror is a dynamic current mirror (DCM) comprising: an input/output node; a transistor comprising a drain terminal connected to the input/output node; an internal switch comprising a first terminal connected to the input/output node, a second terminal connected to a gate terminal of the transistor, and a third terminal through which a current mirror control signal is provided to turn on and off the internal switch; and at least one capacitor comprising a first terminal connected to the second terminal of the internal switch and the gate terminal of the transistor. ### Claim 3 (depends on 1) The dynamic current rectifier of claim 1 further comprising the controller configured to provide a first control signal to the first and fourth switches to turn on and off the first and fourth switches, and to provide a second control signal to the second and third switches to turn on and off the second and third switches. ### Claim 4 (depends on 3) The dynamic current rectifier of claim 3 wherein a phase of the first control signal is complement of a phase of the second control signal. ### Claim 5 (depends on 3) The dynamic current rectifier of claim 3 wherein the controller is further configured to provide a first current mirror control signal to the first current mirror to switch the first current mirror between an input mode and an output mode, and to provide a second current mirror signal to the second current mirror to switch the second current mirror between an input mode and an output mode. ### Claim 6 (depends on 5) The dynamic current rectifier of claim 5 wherein a phase of the first current mirror control signal is complement of a phase of the second current mirror control signal. ### Claim 7 (depends on 5) The dynamic current rectifier of claim 5 wherein the controller is configured to control the first through fourth switches and the first and second current mirrors such that: the first switch is turned on and the second switch is turned off while the first current mirror is in the input mode; the first switch is turned off and the second switch is turned on while the first current mirror is in the output mode; the third switch is turned on and the fourth switch is turned off while the second current mirror is in the input mode; and the third switch is turned off and the fourth switch is turned on while the second current mirror is in the output mode. ### Claim 8 (depends on 5) The dynamic current rectifier of claim 5 wherein the first current mirror control signal is the first control signal and the second current mirror control signal is the second control signal. ### Claim 9 (depends on 1) The dynamic current rectifier of claim 1 wherein the first through fourth switches are n-channel metal-oxide semiconductor (NMOS) transistors or p-channel metal-oxide semiconductor (PMOS) transistors. ### Claim 10 (depends on 1) The dynamic current rectifier of claim 1 wherein every physical characteristic of the first current mirror and the second current mirror is substantially identical. ### Claim 11 A method for rectifying an alternating electrical current, comprising: supplying an input current to an input terminal of a dynamic current rectifier; supplying a first control signal to a first and fourth switches of the dynamic current rectifier to turn on and off the first and fourth switches at the same time; supplying a second control signal to a second and third switches of the dynamic current rectifier to turn on and off the second and third switches at the same time; supplying a first current mirror control signal to a first current mirror of the dynamic current rectifier to switch the first current mirror between an input mode and an output mode, wherein the first and second switches are coupled to the first current mirror, and wherein the first switch is turned on and the second switch is turned off while the first current mirror is in the input mode; supplying a second current mirror control signal to a second current mirror of the dynamic current rectifier to switch the second current mirror between an input mode and an output mode, wherein the third and fourth switches are coupled to the second current mirror, and wherein the third switch is turned on and the fourth switch is turned off while the second current mirror is in the input mode; supplying a first output control signal to a gate terminal of a fifth switch to turn on the fifth switch at a polarity of the input current and to turn off the fifth switch at an opposite polarity of the input current, wherein the fifth switch comprises a first terminal coupled to an output terminal and a second terminal coupled to the input terminal; supplying a second output control signal to a gate terminal of a sixth switch, wherein the sixth switch comprises a first terminal coupled to the output terminal and a second terminal coupled to a first terminals of the second and fourth switches; and outputting, at the output terminal of the dynamic current rectifier the input current, an output current from the second switch or an output current from the fourth switch. ### Claim 12 (depends on 11) The method of claim 11 wherein the first switch is turned off and the second switch is turned on while the first current mirror is in the output mode, and the third switch is turned off and the fourth switch is turned on while the second current mirror is in the output mode. ### Claim 13 (depends on 11) The method of claim 11 wherein: the first switch comprising a first terminal coupled to the input terminal and a second terminal coupled to the first current mirror; the second switch comprising the first terminal coupled to the output terminal and a second terminal coupled to the first current mirror; the third switch comprising a first terminal coupled to the input terminal and a second terminal coupled to the second current mirror; and the fourth switch comprising the first terminal coupled to the output terminal and a second terminal coupled to the second current mirror. ### Claim 14 (depends on 11) The method of claim 11 wherein each of the first and second current mirror is a dynamic current mirror (DCM) comprising: an input/output node; a transistor comprising a drain terminal connected to the input/output node; an internal switch comprising a first terminal connected to the input/output node, a second terminal connected to a gate terminal of the transistor, and a third terminal through which a current mirror control signal is provided to turn on and off the internal switch; and at least one capacitor comprising a first terminal connected to the second terminal of the internal switch and the gate terminal of the transistor. ### Claim 15 (depends on 11) The method of claim 11 wherein a phase of the first control signal is complement of a phase of the second control signal. ### Claim 16 (depends on 11) The method of claim 11 wherein a phase of the first current mirror control signal is complement of a phase of the second current mirror control signal. ### Claim 17 (depends on 11) The method of claim 11 wherein first current mirror control signal is the first control signal and the second current mirror control signal is the second control signal. ### Claim 18 (depends on 11) The method of claim 11 wherein the first through fourth switches are n-channel metal-oxide semiconductor (NMOS) transistors or p-channel metal-oxide semiconductor (PMOS) transistors. ### Claim 19 (depends on 11) The method of claim 11 wherein every physical characteristic of the first current mirror and the second current mirror is substantially identical.