Nonvolatile memory device, storage device including the same, and method of testing nonvolatile memory device
AssigneeSamsung Electronics Co., Ltd.
InventorsGangmin Lee, Jaehue Shin, Daeseok Byeon, Yongsung Cho
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Abstract
A nonvolatile memory device may include a page buffer, a control signal generator, and a current mirror. The page buffer may be connected to a bitline and may allow a replicated current to flow through a ground terminal in response to a first control signal and a second control signal. The control signal generator may output the first control signal and the second control signal to the page buffer. The current mirror may output, in a virtual cell mode, a control voltage corresponding to a bias current. The control voltage may correspond to the first control signal.
Claims20
A nonvolatile memory device comprising:
- a page buffer connected to a bitline, and configured to allow a replicated current to flow through a ground terminal in response to a first control signal and a second control signal;
- a control signal generator configured to output the first control signal and the second control signal to the page buffer;
- and
- a current mirror configured to output a control voltage corresponding to a bias current in a virtual cell mode,
- wherein the control voltage corresponds to the first control signal.
A storage device comprising:
- a nonvolatile memory package including at least one nonvolatile memory device;
- and
- a controller configured to control the nonvolatile memory package,
- wherein the at least one nonvolatile memory device includes a plurality of page buffers connected to a memory cell array through a plurality of bitlines, and
- wherein the at least one nonvolatile memory device is configured to allow, in a virtual cell mode, a replicated current flowing through each of the plurality of page buffers by using a current mirror connected to a pad, and
- wherein the replicated current corresponds to a cell current of each memory cell in the memory cell array flowing through each of the plurality of bitlines.
A method of testing a nonvolatile memory device including a memory cell array connected to a page buffer through a bitline, the method comprising:
- electrically connecting, in a virtual cell mode, a current mirror bias to a gate of a first control transistor of the page buffer;
- and
- applying a test signal, corresponding to the current mirror bias, to a gate of a second control transistor of the page buffer so as to bias a drain of the first control transistor.
Dependencies are inferred from the claim text.