Minimum memory clock estimation procedures
AssigneeMicron Technology, Inc.
InventorErik V. Pohlmann
Life of this patent
Estimating the term…
Abstract
Methods, systems, and devices for minimum memory clock estimation procedures are described. For instance, a device, such as a host device, may truncate a value of a first parameter associated with a first duration for a clock coupled with a memory array to perform a clock cycle and may determine a value of a second parameter that is inversely proportional to a combination of the truncated first parameter and a correction factor. The device may determine a quantity of clock cycles associated with a second duration for accessing one or more memory cells of the memory array based on adjusting a third parameter associated with the second parameter. The device may access the one or more memory cells of the memory array based on the determined quantity of clock cycles.
Claims17
A method, comprising:
- truncating a value of a first parameter associated with a first duration for a clock coupled with a memory array to perform a clock cycle;
- determining a value of a second parameter that is inversely proportional to a combination of the truncated first parameter and a correction factor;
- determining a quantity of clock cycles associated with a second duration for accessing one or more memory cells of the memory array based at least in part on adjusting a third parameter associated with the second parameter;
- and
- accessing the one or more memory cells of the memory array over a total quantity of clock cycles that is greater than or equal to the determined quantity of clock cycles based at least in part on the determined quantity of clock cycles.
A method, comprising:
- truncating a value of a first parameter associated with a first duration for a clock coupled with a memory array to perform a clock cycle;
- determining a value of a second parameter that is inversely proportional to a combination of the truncated first parameter and a correction factor;
- truncating a value of a third parameter based at least in part on determining the value of the second parameter;
- determining a quantity of clock cycles associated with a second duration for accessing one or more memory cells of the memory array based at least in part on truncating the value of the third parameter;
- and
- accessing the one or more memory cells of the memory array based at least in part on the determined quantity of clock cycles.
An apparatus, comprising:
- a memory array comprising an array of memory cells that each comprise capacitive storage elements;
- and
- a circuit coupled with the memory array and configured to cause the apparatus to:
- truncate a value of a first parameter associated with a first duration for a clock coupled with the memory array to perform a clock cycle;
- determine a value of a second parameter that is inversely proportional to a combination of the truncated first parameter and a correction factor;
- determine a quantity of clock cycles associated with a second duration for accessing one or more memory cells of the memory array based at least in part on adjusting a third parameter associated with the second parameter;
- and
- access the one or more memory cells of the memory array over a total quantity of clock cycles that is greater than or equal to the determined quantity of clock cycles based at least in part on the determined quantity of clock cycles.
An apparatus, comprising:
- a processor;
- memory coupled with the processor;
- and
- instructions stored in the memory and executable by the processor to cause the apparatus to:
- truncate a value of a first parameter associated with a first duration for a clock coupled with a memory array to perform a clock cycle;
- determine a value of a second parameter that is inversely proportional to a combination of the truncated first parameter and a correction factor;
- determine a quantity of clock cycles associated with a second duration for accessing one or more memory cells of the memory array based at least in part on adjusting a third parameter associated with the second parameter;
- and
- access the one or more memory cells of the memory array over a total quantity of clock cycles that is greater than or equal to the determined quantity of clock cycles based at least in part on the determined quantity of clock cycles.
Dependencies are inferred from the claim text.