Display pixel circuitry with shared emission transistors

Display circuitry comprising:

• a first subpixel having a first light-emitting diode, a first drive transistor coupled between a power supply line and the first light-emitting diode, and a first semiconducting oxide anode reset transistor coupled between an anode of the first light-emitting diode and an anode reset voltage line that runs orthogonal to the power supply line, wherein the first semiconducting oxide anode reset transistor has a gate terminal configured to receive a control signal;
• a second subpixel having a second light-emitting diode, a second drive transistor coupled between the power supply line and the second light-emitting diode, and a second semiconducting oxide anode reset transistor coupled between an anode of the second light-emitting diode and the anode reset voltage line, wherein the second semiconducting oxide anode reset transistor has a gate terminal configured to receive the control signal, and wherein the first and second subpixels have mirrored transistor layouts and are disposed along a row of subpixels;
• and
• an emission transistor shared between at least the first and second subpixels, the emission transistor being coupled to a source-drain terminal of the first drive transistor of the first subpixel and to a source-drain terminal of the second drive transistor of the second subpixel.