# US 12,597,390 B2 · Pixel, display device and electronic device including the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,597,390 B2 - Document ID: US12597390B2 - Status: Granted - Kind: B2 - Application number: 19/095,811 - Filed: 2025-03-31 - Published: 2025-10-09 - Granted: 2026-04-07 - Earliest claimed: 2024-04-09 - Assignees: Samsung Display Co., Ltd. - Applicants: Samsung Display Co., Ltd. - Inventors: Min Seong Son; Seung Kyu Lee; Do Yeong Kang; Hyeon Woong Kang; Jin Sung Choi - Web page: https://patentgrep.com/patent/US12597390B2 ## CPC - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 2300/043: Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2320/0233: Improving the luminance or brightness uniformity across the screen - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A pixel including: a fifth transistor between a power voltage and a fourth node, and including a gate electrode connected to a first emission control line; a first transistor between the power voltage and a second node, and including a gate electrode connected to a first node; a second transistor between a data line and the first node, and including a gate electrode connected to a second scan line; a sixth transistor between the second node and a third node, and including a gate electrode connected to a second emission control line; a capacitor between the first node and the second node; and a light emitting element between the third node and a power voltage, in a non-emission period, the sixth transistor is turned off after the fifth transistor is turned off, and in an emission period, the sixth transistor is turned on after the fifth transistor is turned on. ## Claims ### Claim 1 A pixel comprising: a fifth transistor that is connected between a first power voltage and a fourth node, and includes a gate electrode connected to a first emission control line; a first transistor that is connected between the first power voltage and a second node, and includes a first gate electrode connected to a first node; a second transistor that is connected between a data line and the first node, and includes a gate electrode connected to a second scan line; a sixth transistor that is connected between the second node and a third node, and includes a gate electrode connected to a second emission control line; a first capacitor connected between the first node and the second node; and a light emitting element connected between the third node and a second power voltage, wherein when the pixel enters a non-emission period, the sixth transistor is turned off after the fifth transistor is turned off, and when the pixel enters an emission period, the sixth transistor is turned on after the fifth transistor is turned on. ### Claim 2 (depends on 1) The pixel of claim 1, further comprising: a third transistor that is connected between a reference voltage and the first node, and includes a gate electrode connected to a third scan line; a fourth transistor that is connected between the second node and a first initialization voltage, and includes a gate electrode connected to a first scan line; a seventh transistor that is connected between the third node and a second initialization voltage, and includes a gate electrode connected to a fourth scan line; and a second capacitor connected between the reference voltage and the second node, wherein a second gate electrode of the first transistor is connected to the second node. ### Claim 3 (depends on 2) The pixel of claim 2, wherein the first to seventh transistors are N-type transistors. ### Claim 4 (depends on 2) The pixel of claim 2, wherein after the sixth transistor is turned off, a data writing operation using the first capacitor is performed, and after the data writing operation, the fourth transistor is turned on and the first initialization voltage is applied to the second node. ### Claim 5 (depends on 4) The pixel of claim 4, wherein after the first initialization voltage is applied to the second node, the fourth transistor is turned off, and the fifth transistor is turned on, then the seventh transistor is turned off, and then the sixth transistor is turned on to enter the emission period. ### Claim 6 (depends on 2) The pixel of claim 2, wherein when a driving time of a panel driving frame is a reference driving time, one display scan operation is performed, and when the driving time of the panel driving frame is not the reference driving time, one display scan operation and at least one or more self-scan operations are performed; during the display scan operation, after the sixth transistor is turned off, the fourth and seventh transistors are turned on and an initialization operation is performed; the third and fifth transistors are turned on and a threshold voltage compensation operation for the first transistor is performed; the second transistor is turned on and a writing operation using the first capacitor is performed; and after the writing operation is performed, the fourth transistor is turned on and the first initialization voltage is applied to the second node. ### Claim 7 (depends on 6) The pixel of claim 6, wherein after the first initialization voltage is applied to the second node, the fifth transistor is turned on, then the seventh transistor is turned off, and then the sixth transistor is turned on to enter the emission period. ### Claim 8 (depends on 2) The pixel of claim 2, wherein when a driving time of a panel driving frame is a reference driving time, one display scan operation is performed, and when the driving time of the panel driving frame is not the reference driving time, one display scan operation and at least one or more self-scan operations are performed; during the self-scan operation, after the sixth transistor is turned off, the second transistor is turned on and a writing operation using the first capacitor is performed; and after the writing operation is performed, the fourth transistor is turned on and the first initialization voltage is applied to the second node. ### Claim 9 (depends on 8) The pixel of claim 8, wherein after the first initialization voltage is applied to the second node, the fifth transistor is turned on, then the seventh transistor is turned off, and then the sixth transistor is turned on to enter the emission period. ### Claim 10 A display device comprising: a pixel that is connected to a data line, a plurality of emission control lines, and a plurality of scan lines; an emission driver that supplies at least one emission control signal to the plurality of emission control lines; a scan driver that supplies at least one initialization signal, a write signal, and a reset signal to the plurality of scan lines; a data driver that supplies a data voltage to the data line; and a power voltage generator that supplies a first power voltage, a second power voltage, a reference voltage, a first initialization voltage, and a second initialization voltage to the pixel, wherein the pixel includes: a fifth transistor that is connected between a first power voltage and a fourth node, and includes a gate electrode connected to a first emission control line; a first transistor that is connected between the first power voltage and a second node, and includes a first gate electrode connected to a first node; a second transistor that is connected between the data line and the first node, and includes a gate electrode connected to a second scan line; a sixth transistor that is connected between the second node and a third node, and includes a gate electrode connected to a second emission control line; a first capacitor connected between the first node and the second node; and a light emitting element connected between the third node and a second power voltage, and when the pixel enters a non-emission period, the sixth transistor is turned off after the fifth transistor is turned off, and when the pixel enters an emission period, the sixth transistor is turned on after the fifth transistor is turned on. ### Claim 11 (depends on 10) The display device of claim 10, wherein the pixel further includes: a third transistor that is connected between a reference voltage and the first node, and includes a gate electrode connected to a third scan line; a fourth transistor that is connected between the second node and a first initialization voltage, and includes a gate electrode connected to a first scan line; a seventh transistor that is connected between the third node and a second initialization voltage, and includes a gate electrode connected to a fourth scan line; and a second capacitor connected between the reference voltage and the second node, and a second gate electrode of the first transistor is connected to the second node. ### Claim 12 (depends on 11) The display device of claim 11, wherein the first to seventh transistors are N-type transistors. ### Claim 13 (depends on 11) The display device of claim 11, wherein after the sixth transistor is turned off, a data writing operation using the first capacitor is performed, and after the data writing operation, the fourth transistor is turned on and the first initialization voltage is applied to the second node. ### Claim 14 (depends on 13) The display device of claim 13, wherein after the first initialization voltage is applied to the second node, the fourth transistor is turned off, and the fifth transistor is turned on, then the seventh transistor is turned off, and then the sixth transistor is turned on to enter the emission period. ### Claim 15 (depends on 11) The display device of claim 11, wherein when a driving time of a panel driving frame is a reference driving time, one display scan operation is performed, and when the driving time of the panel driving frame is not the reference driving time, one display scan operation and at least one or more self-scan operations are performed; during the display scan operation, after the sixth transistor is turned off, the fourth and seventh transistors are turned on and an initialization operation of the pixel is performed; the third and fifth transistors are turned on and a threshold voltage compensation operation for the first transistor is performed; the second transistor is turned on and a writing operation using the first capacitor is performed; and after the writing operation is performed, the fourth transistor is turned on and the first initialization voltage is applied to the second node. ### Claim 16 (depends on 15) The display device of claim 15, wherein after the first initialization voltage is applied to the second node, the fifth transistor is turned on, then the seventh transistor is turned off, and then the sixth transistor is turned on to enter the emission period. ### Claim 17 (depends on 11) The display device of claim 11, wherein when a driving time of a panel driving frame is a reference driving time, one display scan operation is performed, and when the driving time of the panel driving frame is not the reference driving time, one display scan operation and at least one or more self-scan operations are performed; during the self-scan operation, after the sixth transistor is turned off, the second transistor is turned on and a writing operation using the first capacitor is performed; and after the writing operation is performed, the fourth transistor is turned on and the first initialization voltage is applied to the second node. ### Claim 18 (depends on 17) The display device of claim 17, wherein after the first initialization voltage is applied to the second node, the fifth transistor is turned on, then the seventh transistor is turned off, and then the sixth transistor is turned on to enter the emission period. ### Claim 19 An electronic device, comprising: a processor to provide input image data; and a display device to display an image based on the input image data, wherein the display device comprises: a pixel that is connected to a data line, a plurality of emission control lines, and a plurality of scan lines; an emission driver that supplies at least one emission control signal to the plurality of emission control lines; a scan driver that supplies at least one initialization signal, a write signal, and a reset signal to the plurality of scan lines; a data driver that supplies a data voltage to the data line; and a power voltage generator that supplies a first power voltage, a second power voltage, a reference voltage, a first initialization voltage, and a second initialization voltage to the pixel, wherein the pixel includes: a fifth transistor that is connected between a first power voltage and a fourth node, and includes a gate electrode connected to a first emission control line; a first transistor that is connected between the first power voltage and a second node, and includes a first gate electrode connected to a first node; a second transistor that is connected between the data line and the first node, and includes a gate electrode connected to a second scan line; a sixth transistor that is connected between the second node and a third node, and includes a gate electrode connected to a second emission control line; a first capacitor connected between the first node and the second node; and a light emitting element connected between the third node and a second power voltage, and when the pixel enters a non-emission period, the sixth transistor is turned off after the fifth transistor is turned off, and when the pixel enters an emission period, the sixth transistor is turned on after the fifth transistor is turned on.