Defect detection device and method thereof
AssigneeSamsung Electronics Co., Ltd.
InventorsSungwook Hwang, Tae Soo Shin, Seulgi Ok, Kibum Lee
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Abstract
A defect detection device includes: a memory configured to store a layout image indicating a circuit pattern and indicating a dummy pattern; and a controller comprising an artificial neural network configured to learn the layout image, the controller being configured to: determine, based on an inspection image obtained by photographing an area including a defect on a wafer, whether the defect is in a first area in which the circuit pattern is positioned or in a second area in which the dummy pattern is positioned, by using the artificial neural network, and determine a type of the defect based on whether the defect is positioned is in the first area or in the second area.
Claims18
A defect detection device comprising:
- a memory configured to store a layout image indicating a circuit pattern and indicating a dummy pattern;
- and
- a controller comprising an artificial neural network configured to learn the layout image, the controller being configured to:
- delete a defect and convert an element separated by the defect among a plurality of elements into a single element in an inspection image obtained by photographing an area including the defect and the plurality of elements on a wafer when the defect is smaller than a predetermined size in the inspection image, and determine in the inspection image including the converted element whether the defect is in a first area in which the circuit pattern is positioned or in a second area in which the dummy pattern is positioned by using the artificial neural network, and
- determine a type of the defect based on whether the defect is positioned in the first area or in the second area.
A defect detection method comprising:
- generating a second inspection image by deleting a defect in a first inspection image and converting an element separated by the defect among a plurality of elements into a single element when the defect is smaller than a predetermined size in the first inspection image, wherein the first inspection image is obtained by photographing a wafer including the defect and the plurality of elements, and converting the first inspection image including the converted element into a layout form;
- inputting the second inspection image to an artificial neural network which has been trained based on a layout image indicating a circuit pattern and indicating a dummy pattern;
- determining, using the artificial neural network, whether the defect is positioned in a first area in which the circuit pattern is positioned or in a second area in which the dummy pattern is positioned;
- and
- determining a type of the defect based on whether the defect is positioned in the first area or in the second area.
A defect detection system comprising:
- an inspection device configured to generate an inspection image by photographing a wafer including a defect;
- an artificial neural network configured to learn a layout image indicating a circuit pattern and indicating a dummy pattern;
- and
- a defect detection device configured to:
- delete the defect and convert an element separated by the defect among a plurality of elements into a single element in an inspection image including the defect and the plurality of elements when the defect is smaller than a predetermined size in the inspection image using the artificial neural network, and determine whether the defect is positioned in the inspection image in a first area where the circuit pattern is positioned or in a second area where the dummy pattern is positioned, and
- determine a type of the defect based on whether the defect is positioned in the first area or in the second area.
Dependencies are inferred from the claim text.