Integrated circuit with dynamic fusing of neural network branch structures by topological sequencing

An integrated circuit apparatus for dynamically fusing a branch structure of a neural network according to a fusion policy, comprising:

• a processing apparatus, configured to:
• create a topological sequence according to the branch structure;
• and
• perform a fusion based on a starting layer of the topological sequence and check rules of the fusion policy to create a template fuse unit;
• and
• a computing apparatus, configured to perform neural network computing according to the template fuse unit,
• wherein when creating the topological sequence, the processing apparatus is configured to identify a starting point and an ending point of the branch structure, and the processing apparatus sets the starting point of the branch structure as the starting layer of the topological sequence, and
• wherein the computing apparatus comprises a plurality of clusters, wherein each cluster comprises a plurality of processor cores, wherein each processor core comprises a neuron storage unit, and the processing apparatus is further configured to judge whether the template fuse unit comprises the ending point of the branch structure;
• and if the template fuse unit does not comprise the ending point of the branch structure, the computing apparatus stores an intermediate result of a last layer of each branch in the branch structure in the template fuse unit to the neuron storage unit.