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US 12,596,920 B1Granted
Direct memory access operation for neural network accelerator
AssigneeAmazon Technologies, Inc.
InventorsIlya Minkin, Ron Diamant, Kun Xu
Life of this patent
Estimating the term…
Abstract
In one example, an apparatus comprises: a direct memory access (DMA) descriptor queue that stores DMA descriptors, each DMA descriptor including an indirect address; an address translation table that stores an address mapping between indirect addresses and physical addresses; and a DMA engine configured to: fetch a DMA descriptor from the DMA descriptor queue to the address translation table to translate a first indirect address of the DMA descriptor to a first physical address based on the address mapping, and perform a DMA operation based on executing the DMA descriptor to transfer data to or from the first physical address.
Claims20
An apparatus comprising:
- an input direct memory access (DMA) descriptor queue that stores input DMA descriptors, each of the input DMA descriptors storing an indirect address as a source address;
- an output DMA descriptor queue that stores output DMA descriptors, each of the output DMA descriptors storing an indirect address as a destination address;
- and
- a DMA engine configured to:
- fetch an input DMA descriptor from the input DMA descriptor queue;
- translate a first indirect address of the input DMA descriptor to a first physical address;
- execute the input DMA descriptor to transfer input data from the first physical address in a first memory to a second memory, the first memory and the second memory being separate from the input DMA descriptor queue and the output DMA descriptor queue;
- fetch an output DMA descriptor from the output DMA descriptor queue;
- translate a second indirect address of the output DMA descriptor to a second physical address;
- and
- after a computation operation has been performed to generate output data based on the input data, execute the output DMA descriptor to transfer the output data from the second memory to the second physical address in the first memory, such that the DMA engine is configured to transfer the input data from the first memory to the second memory and the output data from the second memory to the first memory.
8 more elements
A method comprising:
- fetching an input direct memory access (DMA) descriptor from an input DMA descriptor queue;
- translating a first indirect address of the input DMA descriptor to a first physical address;
- executing the input DMA descriptor to transfer input data from the first physical address in a first memory to a second memory, the first memory and the second memory being separate from the input DMA descriptor queue and an output DMA descriptor queue;
- fetching an output DMA descriptor from the output DMA descriptor queue;
- translating a second indirect address of the output DMA descriptor to a second physical address;
- and
- after a computation operation has been performed to generate output data based on the input data, executing the output DMA descriptor to transfer the output data from the second memory to the second physical address in the first memory, such that the input data is transferred from the first memory to the second memory and the output data is transferred from the second memory to the first memory.
4 more elements
A system comprising:
- a host processor configured to:
- create and store input direct memory access (DMA) descriptors in an input DMA descriptor queue, each of the input DMA descriptors storing an indirect address as a source address;
- and
- create and store output DMA descriptors in an output DMA descriptor queue, each of the output DMA descriptors storing an indirect address as a destination address;
- and
- a DMA engine configured to:
- fetch an input DMA descriptor from the input DMA descriptor queue;
- translate a first indirect address of the input DMA descriptor to a first physical address;
- execute the input DMA descriptor to transfer input data from the first physical address in a first memory to a second memory, the first memory and the second memory being separate from the input DMA descriptor queue and the output DMA descriptor queue;
- fetch an output DMA descriptor from the output DMA descriptor queue;
- translate a second indirect address of the output DMA descriptor to a second physical address;
- and
- after a computation operation has been performed to generate output data based on the input data, execute the output DMA descriptor to transfer the output data from the second memory to the second physical address in the first memory, such that the DMA engine is configured to transfer the input data from the first memory to the second memory and the output data from the second memory to the first memory.
10 more elements
Dependencies are inferred from the claim text.