Back to results
US 12,596,649 B2Granted
Memory access device and operating method thereof
AssigneeRebellions Inc.
InventorSeungcheol Baek
Life of this patent
Estimating the term…
Abstract
Provided is an operating method of a memory access device, the operating method including allowing an access of a first processing element to a plurality of data lines of a memory based on a first command, identifying a number of accesses of the first processing element to the plurality of data lines, and when a number of accesses of the first processing element to a first data line among the plurality of data lines reaches a predetermined number of accesses, allowing an access of a second processing element to the first data line based on a second command.
Claims13
An operating method of a memory access device, the operating method comprising:
- allowing an access of a first processing element to a plurality of data lines of a memory based on a first command;
- identifying a number of accesses of the first processing element to the plurality of data lines;
- and
- when a number of accesses of the first processing element to a first data line among the plurality of data lines reaches a predetermined number of accesses, allowing an access of a second processing element to the first data line based on a second command,
- wherein the allowing of the access of the first processing element comprises:
- storing first data of an external memory in the plurality of data lines based on the first command;
- and
- allowing an access of the first processing element to the plurality of data lines in which the first data is stored, and
- wherein the allowing of the access of the second processing element comprises:
- when the number of accesses of the first processing element to the first data line among the plurality of data lines reaches the predetermined number of accesses, storing a portion of data among second data of the external memory in the first data line based on the second command;
- and
- allowing an access of the second processing element to the first data line in which the portion of data is stored.
9 more elements
A memory access device comprising:
- a buffer in which a first command and a second command are stored;
- and
- a controller that allows an access of a first processing element to a plurality of data lines of a memory based on the first command by storing first data of an external memory in the plurality of data lines based on the first command and allowing an access of the first processing element to the plurality of data lines in which the first data is stored, identifies a number of accesses of the first processing element to the plurality of data lines, and when a number of accesses of the first processing element to a first data line among the plurality of data lines reaches a predetermined number of accesses, allows an access of a second processing element to the first data line based on the second command by storing a portion of data among second data of the external memory in the first data line based on the second command and allowing an access of the second processing element to the first data line in which the portion of data is stored.
An accelerator comprising:
- a memory;
- a first processing element;
- a second processing element;
- and
- a memory access device that allows an access of the first processing element to a plurality of data lines of the memory based on a first command by storing first data of an external memory in the plurality of data lines based on the first command and allowing an access of the first processing element to the plurality of data lines in which the first data is stored, identifies a number of accesses of the first processing element to the plurality of data lines, and when a number of accesses of the first processing element to a first data line among the plurality of data lines reaches a predetermined number of accesses, allows an access of the second processing element to the first data line based on a second command by storing a portion of data among second data of the external memory in the first data line based on the second command and allowing an access of the second processing element to the first data line in which the portion of data is stored.
2 more elements
Dependencies are inferred from the claim text.