Processor support for using memory page markings as logging cues to simultaneously record plural execution contexts into independent execution traces

A processor comprising:

• a processing unit;
• a memory cache;
• and
• control logic that configures the processor to record plural execution contexts into independent execution traces by:
• detecting a first memory operation resulting from execution of a first execution context executing at the processor, the first memory operation targeting a first memory address;
• based on detecting the first memory operation, identifying a first corresponding memory marking for the first memory operation, the first corresponding memory marking being one of a plurality of memory markings that include:
• (i) a first memory marking indicating that a first memory region is logged for the first execution context, execution of the first execution context being recorded into a first trace buffer;
• and (ii) a second memory marking indicating that a second memory region is logged for a second execution context, execution of the second execution context being recorded into a second trace buffer;
• based on identifying the first corresponding memory marking as being the second memory marking, and based on the first memory operation resulting from execution of the first execution context, performing at least one of:
• (i) when the first memory operation causes a first influx into the memory cache, initiating logging of the first influx to the second trace buffer;
• (ii) when the first memory operation is a first read from the memory cache, initiating logging of the first read to the first trace buffer;
• or
• (iii) when the first memory operation is a first write to the memory cache, performing one of (a) initiating logging of the first write to the second trace buffer, or (b) evicting a first cache line that is a target of the first write;
• detect a second memory operation resulting from execution of the first execution context, the second memory operation targeting a second memory address;
• identify a second corresponding memory marking for the second memory operation based on detecting the second memory operation, the second corresponding memory marking being one of the plurality of memory markings;
• and
• initiating logging of a second influx to the first trace buffer, based on identifying the second corresponding memory marking as being the first memory marking, based on the second memory operation resulting from execution of the first execution context, and based on the second memory operation causing the second influx into the memory cache.