Virtual metadata storage with decode-alias mitigation

A method of operation with an integrated circuit component, the method comprising:

• receiving a first block of data and corresponding error correction code from one or more external memory components in a memory read operation;
• executing error detection/correction operations with respect to a plurality of input data volumes to generate a corresponding plurality of error syndrome values, the input data volumes each including the first block of data and corresponding error correction code together with a respective, different one of a plurality of q-bit data patterns such that each of the input data volumes is identical to the others of the input data volumes except for the respective different one of the plurality of q-bit data patterns, where q is a nonzero integer;
• generating error qualification information by comparing error location information within the plurality of syndrome values with predetermined error location information;
• and
• selecting one of the plurality of q-bit data patterns to be an output q-bit value based on the error syndrome values and the error qualification information.

An integrated circuit component comprising:

• means for receiving a first block of data and corresponding error correction code from one or more external memory components in a memory read operation;
• means for executing error detection/correction operations with respect to a plurality of input data volumes to generate a corresponding plurality of error syndrome values, the input data volumes each including the first block of data and corresponding error correction code together with a respective, different one of a plurality of q-bit data patterns such that each of the input data volumes is identical to the others of the input data volumes except for the respective different one of the plurality of q-bit data patterns, where q is a nonzero integer,
• means for generating error qualification information by comparing error location information within the plurality of syndrome values with predetermined error location information;
• and
• means for selecting one of the plurality of q-bit data patterns to be an output q-bit value based on the error syndrome values and the error qualification information.