Defect tracking within a computing environment
AssigneeAdvanced Micro Devices, Inc.
InventorsVilas Sridharan, Jeffrey William Kellington, Naveen Krishna Chatradhi, Sivakumar Sathappan
Life of this patent
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Abstract
Defect tracking within a computing environment includes storing a retired page table within a read only memory (ROM) of a computing node. A hardware processor of the computing node detects one or more System-on-Chips (SoCs) within the computing node. The hardware processor reads the retired page table from the read only memory. The hardware processor compares records of the retired page table with the one or more SoCs within the computing node. For each record of the retired page table that matches the one or more SoCs within the computing node, one or more physical pages of a volatile memory of the one or more SoCs are retired based on each record.
Claims20
A method, comprising:
- detecting, by a hardware processor of a computing node, one or more System-on-Chips (SoCs) within the computing node;
- reading, by the hardware processor, a retired page table from a read only memory of the computing node;
- comparing, by the hardware processor, records of the retired page table with the one or more SoCs within the computing node;
- and
- for each record of the retired page table that matches the one or more SoCs within the computing node, retiring one or more physical pages of a volatile memory of the one or more SoCs based on each record.
A computing node, comprising:
- a read only memory configured to store a retired page table;
- one or more System-on-Chips (SoCs);
- and
- a hardware processor configured to execute operations including:
- detecting the one or more SoCs within the computing node;
- reading the retired page table from the read only memory;
- comparing records of the retired page table with the one or more SoCs within the computing node;
- and
- for each record of the retired page table that matches the one or more SoCs within the computing node, retiring one or more physical pages of a volatile memory of the one or more SoCs based on each record.
Dependencies are inferred from the claim text.