Systolic parallel galois hash computing device

A circuit comprising a plurality of sub-circuits, each sub-circuit providing a respective result used to determine a hash for input data, and each sub-circuit comprising:

• at least one multiplier configured to receive a portion of the input data and use at least one of a plurality of pre-computed keys that were computed using Galois multiplication;
• and
• logic circuitry configured to receive one or more outputs of the at least one multiplier as input;
• wherein the at least one multiplier is further configured to receive an output of the logic circuitry;
• wherein each sub-circuit further comprises a first multiplexer configured to select the at least one of the plurality of pre-computed keys for use by the at least one multiplier.

A method comprising:

• dividing incoming data across a plurality of modules;
• within each module of the plurality of modules:
• receiving, by a first multiplier that uses at least one of a plurality of pre-computed keys that were computed using Galois multiplication, a portion of the divided incoming data;
• and
• receiving, by first logic circuitry, an output of the first multiplier and an output of a second multiplier;
• receiving, by second logic circuitry, respective outputs of the first logic circuitry from each module;
• and
• providing, by the second logic circuitry, a hash as an output.