# US 12,596,480 B2 · Bank-based refresh for a memory device

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- Number: US 12,596,480 B2
- Document ID: US12596480B2
- Status: Granted
- Kind: B2
- Application number: 18/896,255
- Filed: 2024-09-25
- Published: 2026-03-26
- Granted: 2026-04-07
- Earliest claimed: 2024-09-25
- Assignees: QUALCOMM Incorporated
- Applicants: QUALCOMM Incorporated
- Inventors: Darshan Kumar Nandanwar; Ankit Gosalia; Swayamsampanna Padhi
- Web page: https://patentgrep.com/patent/US12596480B2

## CPC

- G06F 3/061: {Improving I/O performance}
- G11C 11/40626: {Temperature related aspects of refresh operations}
- G06F 3/0653: {Monitoring storage devices or systems}
- G06F 3/0673: {Single storage device}
- G11C 11/406: Management or control of the refreshing or charge-regeneration cycles
- G11C 11/40618: {Refresh operations over multiple banks or interleaving}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

An apparatus includes a memory controller configured to receive, from a three-dimensional (3D) memory device, first temperature information associated with a first bank of the 3D memory device and to receive, from the 3D memory device, second temperature information associated with a second bank of the 3D memory device. The first bank and the second bank are associated with a common rank of the 3D memory device. The memory controller is further configured to provide, to the 3D memory device, a first refresh command associated with the first bank and to provide, to the 3D memory device, a second refresh command associated with the second bank. The first refresh command is associated with a first refresh interval that is different than a second refresh interval associated with the second refresh command.

## Claims

### Claim 1

An apparatus comprising:
a memory controller configured to:
receive, from a three-dimensional (3D) memory device, first temperature information associated with a first bank of the 3D memory device;
receive, from the 3D memory device, second temperature information associated with a second bank of the 3D memory device, wherein the first bank and the second bank are associated with a common rank of the 3D memory device;
provide, to the 3D memory device, a first refresh command associated with the first bank; and
provide, to the 3D memory device, a second refresh command associated with the second bank,
wherein the first refresh command is associated with a first refresh interval that is different than a second refresh interval associated with the second refresh command, and wherein the memory controller includes:
a bank identifier (ID) decoder configured to receive a first bank ID of the first bank and to receive a second bank ID of the second bank;
a refresh counter update circuit configured to receive the first temperature information and to receive the second temperature information; and
a counter stack coupled to the bank ID decoder and to the refresh counter update circuit.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein the first bank is associated with a first physical distance from the memory controller, wherein the second bank is associated with a second physical distance from the memory controller, and wherein the second physical distance is different than the first physical distance.

### Claim 3 (depends on 2)

The apparatus of claim 2, wherein the first physical distance is less than the second physical distance, and wherein the first refresh interval is less than the second refresh interval.

### Claim 4 (depends on 1)

The apparatus of claim 1, wherein the memory controller is coupled to the first bank and to the second bank by a through-silicon via (TSV).

### Claim 5 (depends on 1)

The apparatus of claim 1, wherein the bank ID decoder is further configured to select a first counter of the counter stack in accordance with the first bank ID and to select a second counter of the counter stack in accordance with the second bank ID.

### Claim 6 (depends on 5)

The apparatus of claim 5, wherein the refresh counter update circuit is further configured to adjust a first value of the first counter in accordance with the first temperature information and to adjust a second value of the second counter in accordance with the second temperature information.

### Claim 7 (depends on 6)

The apparatus of claim 6, wherein the memory controller further includes a refresh request queue configured to:
receive the first bank ID from the counter stack in accordance with expiration of the first counter based on the first value; and
receive the second bank ID from the counter stack in accordance with expiration of the second counter based on the second value.

### Claim 8 (depends on 7)

The apparatus of claim 7, wherein the memory controller is further configured to:
output the first refresh command to the 3D memory device in accordance with the first bank ID reaching a particular position within the refresh request queue; and
output the second refresh command to the 3D memory device in accordance with the second bank ID reaching the particular position within the refresh request queue.

### Claim 9

A method of operation of a memory controller, the method comprising:
receiving, from a three-dimensional (3D) memory device, first temperature information associated with a first bank of the 3D memory device;
receiving, from the 3D memory device, second temperature information associated with a second bank of the 3D memory device, wherein the first bank and the second bank are associated with a common rank of the 3D memory device;
providing, to the 3D memory device, a first refresh command associated with the first bank;
providing, to the 3D memory device, a second refresh command associated with the second bank, wherein the first refresh command is associated with a first refresh interval that is different than a second refresh interval associated with the second refresh command;
receiving, at a bank identifier (ID) decoder, a first bank ID of the first bank and a second bank ID of the second bank; and
receiving, at a refresh counter update circuit, the first temperature information and the second temperature information.

### Claim 10 (depends on 9)

The method of claim 9, wherein the first bank is associated with a first physical distance from the memory controller, wherein the second bank is associated with a second physical distance from the memory controller, and wherein the second physical distance is different than the first physical distance.

### Claim 11 (depends on 10)

The method of claim 10, wherein the first physical distance is less than the second physical distance, and wherein the first refresh interval is less than the second refresh interval.

### Claim 12 (depends on 9)

The method of claim 9, further comprising:
selecting, by the bank ID decoder, a first counter of a counter stack in accordance with the first bank ID; and
selecting, by the bank ID decoder, a second counter of the counter stack in accordance with the second bank ID.

### Claim 13 (depends on 12)

The method of claim 12, further comprising:
adjusting, by the refresh counter update circuit, a first value of the first counter in accordance with the first temperature information; and
adjusting, by the refresh counter update circuit, a second value of the second counter in accordance with the second temperature information.

### Claim 14 (depends on 13)

The method of claim 13, further comprising:
receiving, at a refresh request queue, the first bank ID from the counter stack in accordance with expiration of the first counter based on the first value; and
receiving, at a refresh request queue, the second bank ID from the counter stack in accordance with expiration of the second counter based on the second value.

### Claim 15 (depends on 14)

The method of claim 14, further comprising:
outputting the first refresh command to the 3D memory device in accordance with the first bank ID reaching a particular position within the refresh request queue; and
outputting the second refresh command to the 3D memory device in accordance with the second bank ID reaching the particular position within the refresh request queue.

### Claim 16

A non-transitory computer-readable medium storing instructions executable by one or more processors of a memory controller to initiate, perform, or control operations, the operations comprising:
receiving, from a three-dimensional (3D) memory device, first temperature information associated with a first bank of the 3D memory device;
receiving, from the 3D memory device, second temperature information associated with a second bank of the 3D memory device, wherein the first bank and the second bank are associated with a common rank of the 3D memory device;
providing, to the 3D memory device, a first refresh command associated with the first bank;
providing, to the 3D memory device, a second refresh command associated with the second bank, wherein the first refresh command is associated with a first refresh interval that is different than a second refresh interval associated with the second refresh command;
receiving, at a bank identifier (ID) decoder, a first bank ID of the first bank and a second bank ID of the second bank; and
receiving, at a refresh counter update circuit, the first temperature information and the second temperature information.

### Claim 17 (depends on 16)

The non-transitory computer-readable medium of claim 16, wherein the first bank is associated with a first physical distance from the memory controller, wherein the second bank is associated with a second physical distance from the memory controller, and wherein the second physical distance is different than the first physical distance.

### Claim 18 (depends on 17)

The non-transitory computer-readable medium of claim 17, wherein the first physical distance is less than the second physical distance, and wherein the first refresh interval is less than the second refresh interval.