Autonomous adaptively reconfigurable system

A system comprising:

• an input/output (IO) device to receive a first input signal from a signal source;
• a digital subsystem comprising a memory and a central processing unit (CPU) coupled to the memory;
• a programmable analog subsystem (PASS) coupled to the IO device and to the digital subsystem, wherein the PASS comprises:
• a plurality of reconfigurable analog circuits;
• and
• an interface to communicate data with the CPU;
• and
• an autonomous controller circuit to control the plurality of reconfigurable analog circuits, the autonomous controller comprising at least one timer circuit and at least one control circuit, wherein the autonomous controller circuit is configured, based on a plurality of parameters stored at the autonomous controller circuit, to:
• select a predefined configuration from a set of configurations stored in a state table stored in the autonomous controller circuit, wherein the at least one timer circuit is configured to track time intervals for triggering reconfiguration of the plurality of reconfigurable analog circuits;
• configure the plurality of reconfigurable analog circuits into a first active PASS state, wherein the PASS is to process the first input signal through the plurality of reconfigurable analog circuits in the first active PASS state to generate a first output value based on the first input signal;
• determine, by a sequencer circuit of the autonomous controller, a reconfiguration of the plurality of reconfigurable analog circuits from the first active PASS state to a second active PASS state different from the first active PASS state based on the one or more parameters stored at the state table;
• and
• responsive to a trigger event, autonomously output instructions to at least one of the plurality of reconfigurable analog circuits, the instructions to reconfigure the plurality of reconfigurable analog circuits into the second active PASS state, wherein the PASS is to receive a second input signal or output an output signal via one or more of the plurality of reconfigurable analog circuits in the second active PASS state based on the first output value.

A method comprising:

• receiving a first input signal from an input/output (IO) device by a programmable analog subsystem (PASS) coupled to the IO device, the PASS comprising a plurality of reconfigurable analog circuits, an interface to communicate data with a central processing unit (CPU), and an autonomous controller circuit comprising at least one timer circuit and at least one control circuit, the autonomous controller to control the plurality of reconfigurable analog circuits based on a plurality of parameters stored at the autonomous controller circuit;
• processing, with the PASS in a first active PASS state, the first input signal through the plurality of reconfigurable analog circuits;
• generating a first output value based on the first input signal;
• selecting a predefined configuration from a set of configurations stored in a state table stored in the autonomous controller circuit, wherein the at least one timer circuit is configured to track time intervals for triggering reconfiguration of the plurality of reconfigurable analog circuits;
• determining, by a sequencer circuit of the autonomous controller, a reconfiguration of the plurality of reconfigurable analog circuits from the first active PASS state to a second active PASS state different from the first active PASS state based on the one or more parameters stored at the state table;
• and
• responsive to a trigger event, reconfiguring functionality of the plurality of reconfigurable analog circuits into the second active PASS state based on instructions autonomously output from the autonomous controller circuit.