Pixel, display device including same, and manufacturing method therefor

A display device comprising:

• a display area including pixel areas, and a non-display area;
• and
• a pixel disposed in each of the pixel areas, wherein
• the pixel comprises:
• a first sub-pixel area and a second sub-pixel area adjacent to each other in a first direction, and each of the first sib-pixel area and the second sub-pixel area including a first sub-area, a second sub-area, and a third sub-area spaced apart from each other in a second direction intersecting the first direction;
• a first electrode disposed in each of the first sub-pixel area and the second sub-pixel area, and including a 1-1-th sub-electrode disposed in the first sub-area, a 1-2-th sub-electrode disposed in the second sub-area, and a 1-3-th sub-electrode disposed in the third sub-area;
• a second electrode disposed in each of the first sub-pixel area and the second sub-pixel area, and including a 2-1-th sub-electrode disposed in the first sub-area and spaced apart from the 1-1-th sub-electrode, a 2-2-th sub-electrode disposed in the second sub-area and spaced apart from the 1-2-th sub-electrode, and a 2-3-th sub-electrode disposed in the third sub-area and spaced apart from the 1-3-th sub-electrode;
• light emitting elements disposed between the first electrode and the second electrode in each of the first sub-pixel area and the second sub-pixel area;
• a first driving transistor electrically connected to the 1-1-th sub-electrode of the first sub-pixel area, the first driving transistor including a first gate electrode that controls a drive current through the first driving transistor;
• a second driving transistor electrically connected to the 1-1-th sub-electrode of the second sub-pixel area, the second driving transistor including a second gate electrode that controls a drive current through the second driving transistor, wherein the first gate electrode and the second gate electrode are connected to a common node such that a gate voltage at the common node simultaneously controls the drive current for both the first driving transistor and the second driving transistor;
• a contact electrode disposed on each of the 1-1-th to 1-3-th sub-electrodes and the 2-1-th to 2-3-th sub-electrodes;
• and
• a first intermediate electrode and a second intermediate electrode disposed in each of the first sub-pixel area and the second sub-pixel area, the first intermediate electrode being disposed in an area between the first sub-area and the second sub-area, and the second intermediate electrode being disposed in an area between the second sub-area and the third sub-area,
• the first intermediate electrode and the contact electrode are integral with each other on the 2-1-th sub-electrode, and electrically connects the 2-1-th sub-electrode to the 1-2-th sub-electrode, and
• the second intermediate electrode and the contact electrode are integral with each other on the 2-2-th sub-electrode, and electrically connects the 2-2-th sub-electrode with the 1-3-th sub-electrode, and
• the light emitting elements are disposed in parallel between the first electrode and a sub-electrode electrically different from the first electrode in each of the first sub-pixel area and the second sub-pixel area, wherein
• the light emitting elements of each of the first sub-pixel area and the second sub-pixel area comprise:
• a plurality of first light emitting elements electrically connected in parallel to each other and a plurality of second light emitting elements electrically connected in parallel to each other, wherein the first light emitting elements and the second light emitting elements are electrically connected in series.