Structure and process for warpage reduction
AssigneeIntel Corporation
InventorsHong Seung Yeon, Liang He, Whitney Bryks, Jung Kyu Han, Gang Duan
Life of this patent
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Abstract
The present disclosure is directed to a semiconductor carrier platform having a support panel with a top surface and a bottom surface, with the top surface providing a working surface for assembling IC packages using panel-level packaging technology. In an aspect, a backside molding layer may be positioned on the bottom surface of the support panel to prevent or correct any panel warpage. In another aspect, a removable film may be positioned between the bottom surface of the support panel and the backside molding layer to allow the support panel to be readily cleaned and reused.
Claims20
A semiconductor carrier platform comprising:
- a support panel with a top surface and a bottom surface, wherein the top surface provides an active or working surface for integrated-circuit packages;
- a backside molding layer, wherein the backside molding layer is positioned on the bottom surface of the support panel and has a coefficient of thermal expansion that is selected based on a coefficient of thermal expansion for the integrated-circuit packages to enable warpage control;
- and
- a removable film positioned between the bottom surface of the support panel and the backside molding layer.
A method comprising:
- providing a support panel, wherein the support panel has a top surface and a bottom surface and the top surface provides an active area for assembly of integrated-circuit packages;
- placing a removable film on the bottom surface of the support panel;
- and
- depositing an epoxy material on the removable film to form a semiconductor carrier platform, wherein the epoxy material provides a backside molding layer for the semiconductor carrier platform that enables warpage control.
A method comprising:
- providing a support panel, wherein the support panel has a top surface and a bottom surface;
- providing a plurality of integrated-circuit packages on an active area of the top surface of the support panel;
- depositing an epoxy material over the bottom surface, wherein the epoxy material provides a backside molding layer for the support panel;
- and
- performing semiconductor processing operations on the plurality of integrated-circuit packages, wherein the support panel and the backside molding layer provide a semiconductor carrier platform for integrated-circuit packages during the semiconductor processing operations, wherein the backside molding layer has a coefficient of thermal expansion that is selected based on a coefficient of thermal expansion for the integrated-circuit packages to enable warpage control.
Dependencies are inferred from the claim text.