Memory device and method for manufacturing the same

A memory device, comprising:

• a stacked structure comprising conductive layers, wherein the stacked structure has an array region and a staircase region adjacent to the array region;
• a lower isolation structure in the stacked structure and having an upper surface in a lower portion of the stacked structure, wherein the lower isolation structure extends from the array region to the staircase region, and the lower isolation structure separates at least one conductive layer of the conductive layers disposed in the lower portion of the stacked structure into a first conductive strip and a second conductive strip, the first conductive strip and the second conductive strip are electrically isolated from each other,
• two memory strings in the array region of the stacked structure and electrically connected to the first conductive strip and the second conductive strip respectively;
• and
• at least one lower support member in the staircase region of the stacked structure, a material of the at least one lower support member is the same as a material of the lower isolation structure, and a height of the at least one lower support member is the same as a height of the lower isolation structure.