Semiconductor transistor device including backside contact structure vertically between backside power rail and source/drain structure and method of forming thereof

A method of manufacturing an integrated circuit device, the method comprising:

• forming a semiconductor device having two sides on a substrate, a first side and an opposite side, wherein the semiconductor device has one or more source/drain structures, one or more channel structures and wherein the substrate is on the first side of the semiconductor device;
• forming a back-end-of-line (BEOL) region comprising a plurality of metal layers, disposed on the opposite side of the semiconductor device from the substrate;
• and
• forming a bottle-neck shaped backside contact structure in the substrate and in contact with a first source/drain structure of the semiconductor device,
• wherein forming the bottle-neck shaped backside contact structure comprises forming a first opening above and vertically aligned with a position of the first source/drain structure and extending to a first etch-stop layer,
• wherein the bottle-neck shaped backside contact structure has a first side contacting the first source/drain structure, a second side contacting a backside power rail, and sidewalls extending from the first source/drain structure to the backside power rail;
• and wherein the backside contact structure has a first region having a positive slope and a second region, adjacent to the first region, having no slope.

A device comprising:

• a semiconductor device on a substrate, the semiconductor device having at least two sides and the semiconductor device including:
• a bottom dielectric isolation;
• a channel structure and a gate at least partially surrounding the channel structure;
• a plurality of source/drain structures on opposing sides of the channel structure;
• the substrate on a first side of the semiconductor device, the substrate including:
• a backside power rail (BPR);
• a backside contact structure, the backside contact structure vertically between the backside power rail and a first source/drain structure,
• wherein the backside contact structure comprises a first portion contacting the first source/drain structure, having a positive slope,
• wherein the backside contact structure further comprises a second portion adjacent to the first portion having no slope, extending from the first portion to a distance further distal from the first source/drain structure, and
• wherein the backside contact structure includes an initial portion between the first source/drain structure and the first portion, wherein the initial portion has a cylindrical shaped structure and wherein the initial portion has side-walls that contact the bottom dielectric isolation;
• and
• one or more metal signal routing layers disposed on an opposite side of the semiconductor device than the substrate.