Manufacturing method of gate structure

A manufacturing method of a gate structure, comprising:

• providing a semiconductor substrate, wherein an isolation structure is formed in the semiconductor substrate and surrounds an active region in the semiconductor substrate;
• forming a gate pattern on the active region and the isolation structure, wherein the gate pattern comprises:
• a first gate structure;
• and
• a first capping layer disposed on the first gate structure;
• performing a first removing process for removing a part of the first capping layer located above an interface between the active region and the isolation structure and exposing a part of the first gate structure located above the interface between the active region and the isolation structure;
• performing a second removing process for reducing a thickness of the part of the first gate structure located above the interface between the active region and the isolation structure;
• and
• forming a second gate structure on the semiconductor substrate, wherein the second removing process comprises a planarization process performed to the second gate structure, and the thickness of the part of the first gate structure located above the interface between the active region and the isolation structure is reduced by the planarization process.